Patents by Inventor Joshua D. Anderson

Joshua D. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155368
    Abstract: Techniques herein facilitate dynamic configuration of a wireless local area network (WLAN) for large public venue (LPV) environments. In one example, a method may include providing an initial configuration for access points APs of a WLAN for an event at an LPV based on a profile for the event, a location of each AP for the venue, and anticipated demand at the APs; determining, for a particular time for the event, a distribution of wireless devices and channel support capabilities of the wireless devices different locations for the LPV; and providing an updated configuration for one or more APs at the one or more locations for the venue based on the distribution of the wireless devices and the channel support capabilities of the wireless devices determined for the particular time for the event at the LPV.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 9, 2024
    Inventors: John Matthew Swartz, Jerome Henry, Robert Edgar Barton, Matthew Aaron Silverman, Fred Jay Anderson, Joshua D. Suhr
  • Publication number: 20240147245
    Abstract: A method for adaptive presence-based radio configuration of access points in a venue includes defining a number of regions in the venue in which access points are deployed, each region having a center point, and assigning a first access point to a first region, positioned at the center of the first region. The method also includes affecting a first energy level in the first region, which corresponds to a power of a transmit signal emitted by the first access point, and assigning to the first region a configurable capacity value that determines an acceptable overlap constraint between the first energy level of the first region and an energy level of a neighboring region. The method further includes generating data describing a tessellation graph in which a possible map of the access points is formed using an iterative descent process based on the first energy level and the overlap constraint.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Jerome Henry, Robert Edgar Barton, Fred Jay Anderson, Matthew Aaron Silverman, John Matthew Swartz, Joshua D. Suhr
  • Publication number: 20240109492
    Abstract: A rearview mirror assembly that includes a housing and a printed circuit board (PCB) located in the housing. The rearview mirror assembly further includes a monitoring system that includes an image capturing module, an illumination source connected to the PCB, and an optical element aligned with the illumination source. The optical element is configured to redirect an illumination from the illumination source toward an occupant position in an automobile.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 4, 2024
    Applicant: GENTEX CORPORATION
    Inventors: Kasen Keith Anderson, Steven J. Veenman, Brett C. Pothoof, Richard T. Fish, JR., Joshua D. Lintz
  • Patent number: 9477704
    Abstract: A sentiment-scoring system may include a storage device configured to store a plurality of keywords, keyword groups, and a keyword group hierarchy. Each keyword may be associated with at least one of the keyword groups. The keyword hierarchy may include a hierarchy associated with each keyword group. The system may further include a processor in communication with the storage device. The processor may be configured to locate a plurality of sentiment expressions and identify a plurality of keywords present in the plurality of sentiment expressions. The processor may be further configured to determine at least one respective keyword group associated with each identified keyword and determine a sentiment score for each sentiment expression with respect to the associated keyword group within the keyword hierarchy. The processor may be further configured to provide at least one sentiment score to a display. A method and computer-readable medium may also be implemented.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: October 25, 2016
    Assignee: Teradata US, Inc.
    Inventors: Rajeswara R. Kottu, Joshua D. Anderson, Harold R. Lee, Ara Yapejian
  • Patent number: 8258959
    Abstract: An environmentally sealed electronic device with an internal activation circuit that does not require a constant interrogation signal to maintain power to its internal circuitry. The electronic device includes sensor circuitry for gathering or sensing data; an internal battery for powering the sensor circuitry; and an internal activation circuit for activating the sensor circuitry. The sensor circuitry may include a temperature sensor, a location sensor, a signal sensor, a sound detector, a motion sensor, or any other device that senses or gathers data. The battery may be any type of energy storage device such as a lithium or alkaline battery. The activation circuit includes a receiver for receiving a radio frequency signal from an external source and a switch for connecting the battery to the sensor circuitry in response to the receiver. The switch is operable to maintain connection of the battery to the sensor circuitry after the radio frequency signal ceases.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: September 4, 2012
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventor: Joshua D. Anderson
  • Patent number: 8175095
    Abstract: Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Dynamically-sized data packets, sized in accordance with the amount of data ready to be sent, are transferred between the devices and/or interfaces on the card.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: May 8, 2012
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventors: Joshua D. Anderson, Scott M. Burkart, Matthew P. DeLaquil, Deepak Prasanna
  • Patent number: 8166090
    Abstract: A system for solving linear equations comprises a first circuit including a first multiplication module for multiplying a first row of a matrix by a first instance of a vector variable to generate a first product, and a first linear solver module for calculating an updated first element of the vector variable using the first product. A second circuit includes a second multiplication module for multiplying a second row of the matrix by a second instance of the vector variable to generate a second product, and a second linear solver module for calculating an updated second element of the vector variable using the second product. An interface module updates the second instance of the vector variable with the first updated element, and updates the first instance of the vector variable with the second updated element.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: April 24, 2012
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventors: Matthew Pascal DeLaquil, Deepak Prasanna, Scott Michael Burkart, Joshua D. Anderson, Antone Lee Kusmanoff
  • Publication number: 20100277285
    Abstract: Communication between a multi-band RFID tag device that communicates on first and second bands with other devices may be enabled, using a bidirectional communication bridging device that converts first band signals of the RFID tag device to third band signals of another device, and vice-versa. Examples of third band-capable devices that may be bridged for communication with the first band of a RFID tag device include WiFi devices such as smart phone, notebook computer, WLAN router or any other type of WiFi enabled device. In one example, a tag interface control device may be provided in the form of a WiFi-enabled handheld unit that communicates with a multi-band RFID tag through a bridging device using NBFM radio frequency (RF) communications to retrieve or change stored data and/or change the tag operation. Such a WiFi-enabled handheld unit may be configured to be relatively small, portable, and/or battery or wireless-powered.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Joshua D. Anderson, Scott M. Burkart, Jonathan E. Brown, Michael R. Custer, James K. Burgess, III
  • Publication number: 20100277283
    Abstract: A RFID tag system may be configured as a tag having a first band (e.g., multiple channel-based NBFM frequency band) transceiver to allow field programmability of tag behavior and onboard tag data. The RFID tag system may be configured to collect data from one or more local sensors through the first band link and store data points of interest in tag onboard storage. The RFID tag system may be configured to work in conjunction with a remote interrogating unit, and a handheld device or other local interrogating unit may be additionally or alternatively provided to communicate with such aRFID tag. Data that is stored on the RFID tag may be retrieved or changed, and/or the operation of the tag may be modified.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Scott M. Burkart, Ken A. Stroud, Joshua D. Anderson, Mark A. Chivers, Sujit Ravindran, Ross A. McClain, JR., Jonathan E. Brown, James K. Burgess, III
  • Publication number: 20100169403
    Abstract: A system for solving large-scale matrix equations comprises a plurality of field programmable gate arrays (FPGAs), a plurality of memory elements, a plurality of memory element controllers, and a plurality of processing elements. The FPGAs may include a plurality of configurable logic elements and a plurality of configurable storage elements. The memory elements may be accessible by the FPGAs and may store a matrix and a first vector. The memory element controllers may be formed from configurable logic elements and configurable storage elements and may supply at least a portion of a row of the matrix and at least a portion of the first vector. Each processing element may receive at least the row of the matrix and the first vector and solve an iteration for one element of the first vector.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventors: Matthew P. DeLaquil, Deepak Prasanna, Scott M. Burkart, Joshua D. Anderson, Aya Nagao Bennett
  • Publication number: 20100164742
    Abstract: An environmentally sealed electronic device with an internal activation circuit that does not require a constant interrogation signal to maintain power to its internal circuitry. The electronic device includes sensor circuitry for gathering or sensing data; an internal battery for powering the sensor circuitry; and an internal activation circuit for activating the sensor circuitry. The sensor circuitry may include a temperature sensor, a location sensor, a signal sensor, a sound detector, a motion sensor, or any other device that senses or gathers data. The battery may be any type of energy storage device such as a lithium or alkaline battery. The activation circuit includes a receiver for receiving a radio frequency signal from an external source and a switch for connecting the battery to the sensor circuitry in response to the receiver. The switch is operable to maintain connection of the battery to the sensor circuitry after the radio frequency signal ceases.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventor: Joshua D. Anderson
  • Publication number: 20100157854
    Abstract: Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Dynamically-sized data packets, sized in accordance with the amount of data ready to be sent, are transferred between the devices and/or interfaces on the card.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 24, 2010
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventors: Joshua D. Anderson, Scott M. Burkart, Matthew P. DeLaquil, Deepak Prasanna
  • Publication number: 20090172052
    Abstract: A system for solving linear equations comprises a first circuit including a first multiplication module for multiplying a first row of a matrix by a first instance of a vector variable to generate a first product, and a first linear solver module for calculating an updated first element of the vector variable using the first product. A second circuit includes a second multiplication module for multiplying a second row of the matrix by a second instance of the vector variable to generate a second product, and a second linear solver module for calculating an updated second element of the vector variable using the second product. An interface module updates the second instance of the vector variable with the first updated element, and updates the first instance of the vector variable with the second updated element.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS L.P.
    Inventors: Matthew Pascal DeLaquil, Deepak Prasanna, Scott Michael Burkart, Joshua D. Anderson