Patents by Inventor Joshua D. Barczak

Joshua D. Barczak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8810590
    Abstract: A method and apparatus for sorting data into spatial bins or buckets using a graphics processing unit (GPU). The method takes unsorted point data as input and scatters the points, in sorted order, into a set of bins. This key operation enables construction of a spatial data structure that is useful for applications such as particle simulation or collision detection. The disclosed method achieves better performance scaling than previous methods by exploiting geometry shaders to progressively trim the size of a working set. The method also leverages predicated rendering functionality to allow early termination without CPU/GPU synchronization. Furthermore, unlike previous techniques, the method can guarantee sorted output without requiring sorted input. This allows the method to be used to implement a form of bucket sort using the GPU.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: August 19, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher Oat, Shopf Jeremy, Joshua D. Barczak
  • Patent number: 8379019
    Abstract: Presented are systems and methods that change the order in which triangles are rendered, to improve post-transform vertex cache efficiency and reduce view-independent overdraw. The resulting triangle orders are orders magnitude faster to compute compared to previous methods. The improvements in processing speed allow such methods to be performed on a model after it is loaded (i.e., when more information on the host hardware is available). Also, such methods can be executed interactively, allowing for re-optimization in case of changes to geometry or topology, which happen often in CAD/CAM applications.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: February 19, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joshua D. Barczak, Diego F. Nehab, Pedro V. Sander
  • Patent number: 8284197
    Abstract: A method and apparatus for rendering instance geometry whereby all culling, level of detail (LOD) and scene management is performed directly on a GPU.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: October 9, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Joshua D. Barczak
  • Publication number: 20100231588
    Abstract: A method and apparatus for rendering instance geometry whereby all culling, level of detail (LOD) and scene management is performed directly on a GPU.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 16, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventor: Joshua D. Barczak
  • Publication number: 20100141666
    Abstract: A method and apparatus for sorting data into spatial bins or buckets using a graphics processing unit (GPU). The method takes unsorted point data as input and scatters the points, in sorted order, into a set of bins. This key operation enables construction of a spatial data structure that is useful for applications such as particle simulation or collision detection. The disclosed method achieves better performance scaling than previous methods by exploiting geometry shaders to progressively trim the size of a working set. The method also leverages predicated rendering functionality to allow early termination without CPU/GPU synchronization. Furthermore, unlike previous techniques, the method can guarantee sorted output without requiring sorted input. This allows the method to be used to implement a form of bucket sort using the GPU.
    Type: Application
    Filed: July 10, 2009
    Publication date: June 10, 2010
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Oat Christopher, Shopf Jeremy, Joshua D. Barczak
  • Publication number: 20100091018
    Abstract: A method carried out by graphics processing circuitry includes generating animated coarse mesh vertex information based on instanced coarse mesh data; and tessellating instanced coarse mesh data based on the animated coarse mesh vertex information to produce instances of a three dimensional object for display. A graphics processing circuitry includes programmable shader logic operative to execute programmable instructions that when executed cause the programmable shader logic to generate animated coarse mesh vertex information based on instanced coarse mesh data; and tessellate instanced coarse mesh data based on the animated coarse mesh vertex information to produce instances of a three dimensional object for display. Another method carried out by graphics processing circuitry includes determining density of a plurality of three dimensional objects in a current view on a display; setting a tessellation level based on said density; and tessellating said plurality of three dimensional objects.
    Type: Application
    Filed: July 10, 2009
    Publication date: April 15, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Natalya A. Tatarchuk, Joshua D. Barczak
  • Publication number: 20090167758
    Abstract: Presented are systems and methods that change the order in which triangles are rendered, to improve post-transform vertex cache efficiency and reduce view-independent overdraw. The resulting triangle orders are orders magnitude faster to compute compared to previous methods. The improvements in processing speed allow such methods to be performed on a model after it is loaded (i.e., when more information on the host hardware is available). Also, such methods can be executed interactively, allowing for re-optimization in case of changes to geometry or topology, which happen often in CAD/CAM applications.
    Type: Application
    Filed: December 26, 2007
    Publication date: July 2, 2009
    Inventors: Joshua D. Barczak, Diego F. Nehab, Pedro V. Sander