Patents by Inventor Joshua Daniel Reiss

Joshua Daniel Reiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230197043
    Abstract: A computer-implemented method of processing audio data, the method comprising receiving input audio data (x) comprising a time-series of amplitude values; transforming the input audio data (x) into an input frequency band decomposition (X1) of the input audio data (x); transforming the input frequency band decomposition (X1) into a first latent representation (Z); processing the first latent representation (Z) by a first deep neural network to obtain a second latent representation (Z{circumflex over (?)}, Z1{circumflex over (?)}); transforming the second latent representation (Z{circumflex over (?)}, Z1{circumflex over (?)}) to obtain a discrete approximation (X3{circumflex over (?)}); element-wise multiplying the discrete approximation (X3{circumflex over (?)}) and a residual feature map (R, X5{circumflex over (?)}) to obtain a modified feature map, wherein the residual feature map (R, X5{circumflex over (?)}) is derived from the input frequency band decomposition (X1); processing a pre-shaped frequency band
    Type: Application
    Filed: May 12, 2020
    Publication date: June 22, 2023
    Applicant: QUEEN MARY UNIVERSITY OF LONDON
    Inventors: Marco Antonio MARTINEZ RAMIREZ, Joshua Daniel REISS, Emmanouil BENETOS
  • Patent number: 7777657
    Abstract: A method is provided for detecting limit cycles in a sigma delta modulator having an output signal that varies over a series of time intervals. In this method a first value that is indicative of the level of the modulator output signal after a predetermined time interval is stored in a first memory, and a second value that is indicative of the level of the modulator output signal after a further time interval subsequent to the predetermined time interval is stored in a second memory. The first value stored in the first memory is compared with the second value stored in the second memory, and an output indicative of a tendency for limit cycles to be produced in the modulator output signal is provided in response to such comparison. Such a method is particularly advantageous for detecting limit cycles in a sigma delta modulator as it can be implemented in a straightforward manner and offers a very accurate limit cycle detection mechanism.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: August 17, 2010
    Inventors: Mark Brian Sandler, Joshua Daniel Reiss
  • Publication number: 20080309529
    Abstract: A method is provided for detecting limit cycles in a sigma delta modulator having an output signal that varies over a series of time intervals. In this method a first value that is indicative of the level of the modulator output signal after a predetermined time interval is stored in a first memory, and a second value that is indicative of the level of the modulator output signal after a further time interval subsequent to the predetermined time interval is stored in a second memory. The first value stored in the first memory is compared with the second value stored in the second memory, and an output indicative of a tendency for limit cycles to be produced in the modulator output signal is provided in response to such comparison. Such a method is particularly advantageous for detecting limit cycles in a sigma delta modulator as it can be implemented in a straightforward manner and offers a very accurate limit cycle detection mechanism.
    Type: Application
    Filed: June 29, 2006
    Publication date: December 18, 2008
    Applicant: Queen Mary & Westfield College
    Inventors: Mark Brian Sandler, Joshua Daniel Reiss