Patents by Inventor Joshua Jennings

Joshua Jennings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12026177
    Abstract: In some examples, a computing device may store a first snapshot of a state of data in a first partition at a first point in time. The computing device may create a second partition and a third partition to each receive a portion of the data, the second partition and the third partition each including a metrics schema, and may determine information for the metrics schemas based on information in the first snapshot. During the determining of the information for the metrics schemas, the computing device may receive a write to the first partition. The computing device may update the first partition based on the write and may add a split update command to a data structure based on the write. In addition, the computing device may update at least one of the metrics schemas in the second partition or the third partition based on the split update command.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 2, 2024
    Assignee: HITACHI VANTARA LLC
    Inventors: Kevin Canuette Grimaldi, Joshua Jen Monzon
  • Patent number: 11586436
    Abstract: A system for version control is presented. The system includes a computing device, wherein the computing device is configured to receive a package build, wherein the package build a package build manifest, identify a package syntax element from the package build perform a manifest search as a function of the package syntax element, produce a universal version element as a function of the manifest search, verify the universal version element as a function of a version authenticator, and install the package build as a function of the verification.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: February 21, 2023
    Assignee: SOOS LLC
    Inventor: Joshua Jennings
  • Publication number: 20220391411
    Abstract: In some examples, a computing device may store a first snapshot of a state of data in a first partition at a first point in time. The computing device may create a second partition and a third partition to each receive a portion of the data, the second partition and the third partition each including a metrics schema, and may determine information for the metrics schemas based on information in the first snapshot. During the determining of the information for the metrics schemas, the computing device may receive a write to the first partition. The computing device may update the first partition based on the write and may add a split update command to a data structure based on the write. In addition, the computing device may update at least one of the metrics schemas in the second partition or the third partition based on the split update command.
    Type: Application
    Filed: December 27, 2019
    Publication date: December 8, 2022
    Inventors: Kevin Canuette GRIMALDI, Joshua Jen MONZON
  • Patent number: 8653867
    Abstract: A pulse modulated neural integrator circuit is comprised of discrete analog electronic components and has a plurality of discrete stable states. In some embodiments, the pulse modulated neural integrator circuit is fabricated in whole or in part on an integrated circuit substrate using analog VLSI techniques. A phase locked loop circuit can use the pulse modulated neural integrator circuit in place of some conventional phase locked loop circuits.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: February 18, 2014
    Assignees: Massachusetts Institute of Technology, University of New Hampshire
    Inventors: Chi-Sang Poon, Joshua Jen Monzon, Kuan Zhou
  • Patent number: 8600919
    Abstract: A neuromorphic circuit performs functions representative of spiking timing dependent plasticity of a synapse.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: December 3, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Chi-Sang Poon, Joshua Jen Choa Monzon, Kuan Zhou
  • Patent number: 8504503
    Abstract: A pulse modulated neural integrator circuit is comprised of discrete analog electronic components and has a plurality of discrete stable states. In some embodiments, the pulse modulated neural integrator circuit is fabricated in whole or in part on an integrated circuit substrate using analog VLSI techniques. A phase locked loop circuit can use the pulse modulated neural integrator circuit in place of some conventional phase locked loop circuits.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: August 6, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Chi-Sang Poon, Joshua Jen Monzon, Guy Rachmuth, Kuan Zhou
  • Publication number: 20110137843
    Abstract: A neuromorphic circuit performs functions representative of spiking timing dependent plasticity of a synapse.
    Type: Application
    Filed: August 25, 2009
    Publication date: June 9, 2011
    Applicants: MASSACHUSETTS INSTITUTE OF TECHNOLOGY, UNIVERSITY OF NEW HAMPSHIRE
    Inventors: Chi-Sang Poon, Joshua Jen Choa Monzon, Kuan Zhou