Abstract: A block structured data processing system concatenates block structured code so as to expedite the execution of less structured language code. The concatenation is performed in a code unit for a parallel pipeline processor so that the concatenated code can be executed in parallel. To optimize the access to the data associated with address couples, an address couple associative memory (ACAM) is provided for the translation of conventional address couples found in block structured systems into general registers numbers. The mechanism attempts to keep data in the general registers thus removing the requirement to re-fetch it from the memory system. To expedite the fetching of data arrays, descriptors may be stored in ACAM for use in continuously accessing data arrays in memory.