Patents by Inventor Jothilingam RAMALINGAM
Jothilingam RAMALINGAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260106122Abstract: A metal-containing photoresist film may be deposited on a semiconductor substrate. Unintended metal-containing material may form on internal surfaces of a process chamber during deposition, bevel and backside cleaning, exposure, baking, development, etch, or other photolithography operations. A dry chamber clean may remove some of the unintended metal-containing material by exposure to plasma. A dry chamber clean may remove some of the unintended metal-containing material and modify some of the unintended metal-containing material by exposure to an etch gas at an elevated temperature without striking a plasma. The dry chamber clean may remove the modified metal-containing material using plasma having a chemistry configured to form volatile products of the modified metal-containing material. In some embodiments, the plasma includes a halide-containing plasma, hydrogen-containing plasma, hydrocarbon-containing plasma, inert gas-containing plasma, or mixtures thereof.Type: ApplicationFiled: October 5, 2023Publication date: April 16, 2026Inventors: Boris VOLOSSKIY, Shambhu KC, Chen WANG, Andrew Pratheep LUSHINGTON, Michael Thomas MYERS, Timothy William WEIDMAN, Jeremy Todd TUCKER, Daniel PETER, Samantha S.H. TAN, Jerome S. HUBACEK, Alan J. JENSEN, Jothilingam RAMALINGAM, Richard WISE, Jason STEVENS, Seng ONG, Shahd Hassan LABIB, Yoko YAMAGUCHI
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Patent number: 12368033Abstract: Methods and apparatus for reducing burn-in time of a physical vapor deposition shield, including: sputtering a dielectric target having a first dielectric constant to form a dielectric layer upon an inner surface of a shield, wherein the shield includes an aluminum oxide coating having a second dielectric constant in an amount sufficient to reduce the burn-in time, and wherein the first dielectric constant and second dielectric constant are substantially similar.Type: GrantFiled: December 12, 2023Date of Patent: July 22, 2025Assignee: APPLIED MATERIALS, INC.Inventors: Jothilingam Ramalingam, William Fruchterman
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Patent number: 12176205Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: GrantFiled: June 19, 2023Date of Patent: December 24, 2024Assignee: Applied Materials, Inc.Inventors: Chunming Zhou, Jothilingam Ramalingam, Yong Cao, Kevin Vincent Moraes, Shane Lavan
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Patent number: 12142478Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: GrantFiled: September 2, 2022Date of Patent: November 12, 2024Assignee: Applied Materials, Inc.Inventors: Chunming Zhou, Jothilingam Ramalingam, Yong Cao, Kevin Vincent Moraes, Shane Lavan
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Patent number: 12027354Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.Type: GrantFiled: July 11, 2022Date of Patent: July 2, 2024Assignee: Applied Materials, Inc.Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
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Patent number: 11994800Abstract: Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.Type: GrantFiled: December 14, 2022Date of Patent: May 28, 2024Assignee: Applied Materials, Inc.Inventors: Tejinder Singh, Lifan Yan, Abhijit B. Mallick, Daniel Lee Diehl, Ho-yung Hwang, Jothilingam Ramalingam
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Publication number: 20240105433Abstract: Methods and apparatus for reducing burn-in time of a physical vapor deposition shield, including: sputtering a dielectric target having a first dielectric constant to form a dielectric layer upon an inner surface of a shield, wherein the shield includes an aluminum oxide coating having a second dielectric constant in an amount sufficient to reduce the burn-in time, and wherein the first dielectric constant and second dielectric constant are substantially similar.Type: ApplicationFiled: December 12, 2023Publication date: March 28, 2024Inventors: Jothilingam RAMALINGAM, William FRUCHTERMAN
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Patent number: 11915918Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.Type: GrantFiled: June 29, 2021Date of Patent: February 27, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D. Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
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Patent number: 11842890Abstract: Methods and apparatus for reducing burn-in time of a physical vapor deposition shield, including: sputtering a dielectric target having a first dielectric constant to form a dielectric layer upon an inner surface of a shield, wherein the shield includes an aluminum oxide coating having a second dielectric constant in an amount sufficient to reduce the burn-in time, and wherein the first dielectric constant and second dielectric constant are substantially similar.Type: GrantFiled: August 16, 2020Date of Patent: December 12, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Jothilingam Ramalingam, William Fruchterman
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Publication number: 20230335393Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: ApplicationFiled: June 19, 2023Publication date: October 19, 2023Inventors: Chunming ZHOU, Jothilingam RAMALINGAM, Yong CAO, Kevin Vincent MORAES, Shane LAVAN
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Patent number: 11661651Abstract: Methods and apparatus for passivating a target are provided herein. For example, a method includes a) supplying an oxidizing gas into an inner volume of the process chamber; b) igniting the oxidizing gas to form a plasma and oxidize at least one of a target or target material deposited on a process kit disposed in the inner volume of the process chamber; and c) performing a cycle purge comprising: c1) providing air into the process chamber to react with the at least one of the target or target material deposited on the process kit; c2) maintaining a predetermined pressure for a predetermined time within the process chamber to generate a toxic by-product caused by the air reacting with the at least one of the target or target material deposited on the process kit; and c3) exhausting the process chamber to remove the toxic by-product.Type: GrantFiled: June 13, 2022Date of Patent: May 30, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Chao Du, Xing Chen, Keith A. Miller, Jothilingam Ramalingam, Jianxin Lei
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Patent number: 11655534Abstract: Apparatus that forms low resistivity tungsten film on substrates. In some embodiments, the apparatus may provide reduced resistivity of tungsten by being configured to generate a plasma in a processing volume of a physical vapor deposition (PVD) chamber with a process gas of krypton and using an RF power with a frequency of approximately 60 MHz, apply bias power at frequency of approximately 13.56 MHz to a substrate, and sputter a tungsten target to deposit a tungsten thin film on the substrate. At least approximately 90% of the deposited tungsten thin film has a <110> crystalline orientation plane approximately parallel to a top surface of the substrate.Type: GrantFiled: July 5, 2022Date of Patent: May 23, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Wenting Hou, Jianxin Lei, Jothilingam Ramalingam, Prashanth Kothnur, William R. Johanson
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Publication number: 20230115004Abstract: Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.Type: ApplicationFiled: December 14, 2022Publication date: April 13, 2023Inventors: Tejinder SINGH, Lifan YAN, Abhijit B. MALLICK, Daniel Lee DIEHL, Ho-yung HWANG, Jothilingam RAMALINGAM
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Patent number: 11572618Abstract: A method of depositing a backside film layer on a backside of a substrate includes loading a substrate having one or more films deposited on a front side of the substrate onto a substrate support of a processing chamber, depositing, from the sputter target, a target material on the backside of the substrate to form a backside layer on the backside of the substrate, and applying an RF bias to an electrode disposed within the substrate support while depositing the target material. The front side of the substrate faces the substrate support and is spaced from a top surface of the substrate support, and a backside of the substrate faces a sputter target of the processing chamber.Type: GrantFiled: August 26, 2020Date of Patent: February 7, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Jothilingam Ramalingam, Xiaozhou Che, Yong Cao, Shane Lavan, Chunming Zhou
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Patent number: 11550222Abstract: Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.Type: GrantFiled: June 2, 2020Date of Patent: January 10, 2023Assignee: Applied Materials, Inc.Inventors: Tejinder Singh, Lifan Yan, Abhijit B. Mallick, Daniel Lee Diehl, Ho-yung Hwang, Jothilingam Ramalingam
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Publication number: 20220415636Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.Type: ApplicationFiled: June 29, 2021Publication date: December 29, 2022Applicant: Applied Materials, Inc.Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D. Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
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Publication number: 20220415649Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: ApplicationFiled: September 2, 2022Publication date: December 29, 2022Inventors: Chunming ZHOU, Jothilingam RAMALINGAM, Yong CAO, Kevin Vincent MORAES, Shane LAVAN
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Publication number: 20220415637Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.Type: ApplicationFiled: July 11, 2022Publication date: December 29, 2022Applicant: Applied Materials, Inc.Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D. Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
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Patent number: 11512387Abstract: Methods and apparatus for passivating a target are provided herein. For example, a method includes a) supplying an oxidizing gas into an inner volume of the process chamber; b) igniting the oxidizing gas to form a plasma and oxidize at least one of a target or target material deposited on a process kit disposed in the inner volume of the process chamber; and c) performing a cycle purge comprising: c1) providing air into the process chamber to react with the at least one of the target or target material deposited on the process kit; c2) maintaining a predetermined pressure for a predetermined time within the process chamber to generate a toxic by-product caused by the air reacting with the at least one of the target or target material deposited on the process kit; and c3) exhausting the process chamber to remove the toxic by-product.Type: GrantFiled: April 13, 2020Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Chao Du, Xing Chen, Keith A. Miller, Jothilingam Ramalingam, Jianxin Lei
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Patent number: 11495461Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.Type: GrantFiled: February 25, 2020Date of Patent: November 8, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Tejinder Singh, Suketu Arun Parikh, Daniel Lee Diehl, Michael Anthony Stolfi, Jothilingam Ramalingam, Yong Cao, Lifan Yan, Chi-I Lang, Hoyung David Hwang