Abstract: A modular IoT sensor system for Internet of things includes a network module and an expanded sensor module. The expanded sensor module includes a male connector and a female connector respectively disposed in two connection surfaces of the expanded sensor module, configured to detachably connect to a female connector of the network module. Shape and size of the female connector of the network module and the male connector and the female connector of the expanded sensor module conform to a USB type-C specification and pin definitions thereof are complied with a first pin definition different from USB type-C specification.

Abstract: A enhanced DLL includes a delay chain, a phase detector and a delay control unit. The delay chain is arranged to delay a reference clock signal to generate a delayed reference clock signal and reflect the delay control setting on the delayed reference clock signal, wherein the delay chain is periodically reset according to a period of the reference clock signal. The phase detector is coupled to the delay chain, and arranged to detect a phase shift between the delayed reference clock signal and the reference clock signal, thereby to generate a control value. The delay control unit is coupled to the delay chain and the phase detector, and arranged to adjust the delay control setting based on the control value.

Abstract: The present invention provides a sub-WSN for an IoT system having at least a sensor node, and a sub-sensor node and a sub-gateway for the sub-WSN, so as to solve the problems of low channel quantity and high power consumption in the prior art. The sub-WSN comprises: a sub-gateway and a plurality of sub-sensor nodes. The sub-gateway is wiredly coupled to the Sensor node. The sub-sensor nodes are utilized for sensing and wirelessly communicating with the sub-gateway via RF signals.

Abstract: A method for controlling charge states of a plurality of battery cells connected in series comprises: for a charge node of each battery cells, comparing a voltage of the charge node with a plurality of reference voltages to generate a comparison result, wherein the comparison result comprises a plurality of digital values, respectively; determining a charge state of each battery cell by calculating a difference between the comparison results of two charge nodes of two adjacent battery cells; and controlling charge currents supplied to the battery cells according the charge states of the battery cells, respectively.

Abstract: A resistive random access memory device includes: a first control line, a second control line, a RRAM cell, a first programmable current source and a first programmable voltage source. The RRAM cell is coupled between the first control line and the second control line, and has a programmable resistive element. The first programmable current source is coupled to the first control line, and for selectively providing a configuration current to the RRAM cell. The first programmable voltage source is coupled to the first control line, and for selectively providing a configuration voltage to the RRAM cell. Additionally, a state of the programmable resistive element of the RRAM cell is configured according to the configuration current and the configuration voltage. Under architecture of the RRAM cell of the present invention, a reading circuit for the RRAM device can be implemented with a simple inverter instead of a complicated current sensing amplifier.

Abstract: A resistive random access memory device includes: a first control line, a second control line, a RRAM cell, a first programmable current source and a first programmable voltage source. The RRAM cell is coupled between the first control line and the second control line, and has a programmable resistive element. The first programmable current source is coupled to the first control line, and for selectively providing a configuration current to the RRAM cell. The first programmable voltage source is coupled to the first control line, and for selectively providing a configuration voltage to the RRAM cell. Additionally, a state of the programmable resistive element of the RRAM cell is configured according to the configuration current and the configuration voltage. Under architecture of the RRAM cell of the present invention, a reading circuit for the RRAM device can be implemented with a simple inverter instead of a complicated current sensing amplifier.