Patents by Inventor Jouko Lang
Jouko Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220310875Abstract: The aspects of the disclosed embodiments relates to an optoelectronic device including a substrate layer having a first surface plane and a second surface plane opposite and parallel to the first surface plane. The device also includes a mesa structure arranged on the first surface plane of the substrate layer. The mesa structure includes at least one layer of material; and a first surface arranged at an angle ? with respect to the first surface plane of the substrate layer, wherein the angle ? is different from 0° and 180°. The device still further includes a first terminating oxide layer of a first type arranged on the first surface of the mesa structure and the first surface of the mesa structure has been cleaned by removing at least 75% of native oxides on the first surface of the mesa structure before arranging the first terminating oxide layer of a first type thereon.Type: ApplicationFiled: May 29, 2020Publication date: September 29, 2022Applicant: Comptek Solutions OyInventors: Jouko Lång, Marjukka Tuominen, Johnny Dahl, Vicente Alonso
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Patent number: 11276989Abstract: The present disclosure is related to a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprising a stacked configuration of a plurality of semiconductor layers. At least one of the semiconductor layers is a III-V compound semiconductor layer, and at least one of the III-V compound semiconductor layers has formed thereonto a corresponding crystalline terminating oxide layer, wherein the at least one of the plurality of semiconductor layers interfaces via its crystalline terminating oxide layer to a neighbouring epitaxial semiconductor layer thereto. The semiconductor device is a quantum well device.Type: GrantFiled: July 27, 2018Date of Patent: March 15, 2022Assignee: Comptek Solutions OyInventors: Vicente Calvo Alonso, Johnny Dahl, Jouko Lang
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Publication number: 20210183649Abstract: Disclosed is a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device comprises a first III-V compound semiconductor layer having a first material structure, a second semiconductor layer having a second material structure and a third semiconductor layer having a third material structure. An interface between the first semiconductor layer and the second semiconductor layer consists of at least one corresponding crystalline terminating oxide layer of the first semiconductor layer, and an interface between the second semiconductor layer and the third semiconductor layer comprises at least one corresponding crystalline terminating oxide layer of a III-V compound semiconductor layer.Type: ApplicationFiled: July 27, 2018Publication date: June 17, 2021Applicant: Comptek Solutions OyInventors: Johnny DAHL, Jouko LANG, Vicente CALVO ALONSO
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Patent number: 11037782Abstract: Disclosed is a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device comprises a first III-V compound semiconductor layer having a first material structure, a second semiconductor layer having a second material structure and a third semiconductor layer having a third material structure. An interface between the first semiconductor layer and the second semiconductor layer consists of at least one corresponding crystalline terminating oxide layer of the first semiconductor layer, and an interface between the second semiconductor layer and the third semiconductor layer comprises at least one corresponding crystalline terminating oxide layer of a III-V compound semiconductor layer.Type: GrantFiled: July 27, 2018Date of Patent: June 15, 2021Assignee: Comptek Solutions OyInventors: Johnny Dahl, Jouko Lang, Vicente Calvo Alonso
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Patent number: 11031507Abstract: Disclosed is a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprises a plurality of layers. The method of fabricating the semiconductor device comprises obtaining a substrate layer, arranging a first corresponding crystalline terminating oxide layer on the substrate layer, arranging at least one semiconductor layer on the first crystalline terminating oxide layer, arranging a second corresponding crystalline terminating oxide layer on the at least one semiconductor layer, and arranging an electrical insulating layer on the second crystalline terminating oxide layer.Type: GrantFiled: July 27, 2018Date of Patent: June 8, 2021Assignee: Comptek Solutions OyInventors: Johnny Dahl, Vicente Calvo Alonso, Jouko Lang
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Publication number: 20210091231Abstract: Disclosed is a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprises a plurality of layers. The method of fabricating the semiconductor device comprises obtaining a substrate layer, arranging a first corresponding crystalline terminating oxide layer on the substrate layer, arranging at least one semiconductor layer on the first crystalline terminating oxide layer, arranging a second corresponding crystalline terminating oxide layer on the at least one semiconductor layer, and arranging an electrical insulating layer on the second crystalline terminating oxide layer.Type: ApplicationFiled: July 27, 2018Publication date: March 25, 2021Applicant: Comptek Solutions OyInventors: Johnny DAHL, Vicente CALVO ALONSO, Jouko LANG
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Publication number: 20200274332Abstract: The present disclosure is related to a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprising a stacked configuration of a plurality of semiconductor layers. At least one of the semiconductor layers is a III-V compound semiconductor layer, and at least one of the III-V compound semiconductor layers has formed thereonto a corresponding crystalline terminating oxide layer, wherein the at least one of the plurality of semiconductor layers interfaces via its crystalline terminating oxide layer to a neighbouring epitaxial semiconductor layer thereto. The semiconductor device is a quantum well device.Type: ApplicationFiled: July 27, 2018Publication date: August 27, 2020Applicant: Comptek Solutions OyInventors: Vicente CALVO ALONSO, Johnny DAHL, Jouko LANG
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Patent number: 10256290Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: GrantFiled: November 2, 2017Date of Patent: April 9, 2019Assignee: Comptek Solutions OyInventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
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Patent number: 10146257Abstract: In an embodiment, a foldable device having a sensor is described. In an embodiment, the device comprises: A folding area, wherein the folding area is configured to rotate according to an axis of rotation caused by folding the device, causing deformation of the folding area. The folding area comprises: a layer of strain sensitive material having particles, wherein conductivity of the strain sensitive material is configured to change when the layer experiences the deformation. The folding area comprises a layer of conductor lines configured to detect the change of the conductivity of the strain sensitive material, wherein the layer of the conductor lines includes a plurality of contacting points with the strain sensitive material.Type: GrantFiled: October 2, 2015Date of Patent: December 4, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Vicente Calvo Alonso, Jouko Lång
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Patent number: 10031605Abstract: A display integrated pressure sensor is described. In an example, a device comprises: a display including a plurality of layers; a layer of pressure sensitive material having particles; conductivity of the pressure sensitive material is configured to change when the layer experiences deformation; a layer of conductor lines configured to detect the change of the conductivity of the pressure sensitive material; the layer of conductor lines includes a plurality of contacting points with the pressure sensitive material; the layer of pressure sensitive material and the conductor lines are configured to be integrated within the display. In other examples, a manufacturing method and a display module are discussed along with the features of the device.Type: GrantFiled: April 13, 2015Date of Patent: July 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Vicente Calvo Alonso, Oiva Sahlsten, Jouko Lang, Kenneth Majander
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Publication number: 20180069074Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: ApplicationFiled: November 2, 2017Publication date: March 8, 2018Applicant: Comptek Solutions OyInventors: Pekka LAUKKANEN, Jouko LANG, Marko PUNKKINEN, Marjukka TUOMINEN, Veikko TUOMINEN, Johnny DAHL, Juhani VAYRYNEN
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Publication number: 20180032778Abstract: A device, a display and a system are disclosed, all having a display with touch sensing capability. The display senses an object touching the surface of the display and emits light towards the touching object. The light reflects back from the object and travels back through the display to a light detector layer underneath the display stack. The light sensing layer is attached to the display stack with a transparent adhesive that maintains the fingerprint details detectable when the light travels back from the object. The light detector layer may replace the back layer of the display stack. The light detector layer may be applied in various devices having a touch sensing display. The light detector layer may be modular addition to displays in different applications that use identification.Type: ApplicationFiled: July 29, 2016Publication date: February 1, 2018Inventor: Jouko Lång
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Patent number: 9837486Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: GrantFiled: September 15, 2015Date of Patent: December 5, 2017Assignee: Comptek Solutions OyInventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
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Publication number: 20170097660Abstract: In an embodiment, a foldable device having a sensor is described. In an embodiment, the device comprises: A folding area, wherein the folding area is configured to rotate according to an axis of rotation caused by folding the device, causing deformation of the folding area. The folding area comprises: a layer of strain sensitive material having particles, wherein conductivity of the strain sensitive material is configured to change when the layer experiences the deformation. The folding area comprises a layer of conductor lines configured to detect the change of the conductivity of the strain sensitive material, wherein the layer of the conductor lines includes a plurality of contacting points with the strain sensitive material.Type: ApplicationFiled: October 2, 2015Publication date: April 6, 2017Inventors: Vicente Calvo Alonso, Jouko Lång
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Publication number: 20160299613Abstract: A display integrated pressure sensor is described. In an example, a device comprises: a display including a plurality of layers; a layer of pressure sensitive material having particles; conductivity of the pressure sensitive material is configured to change when the layer experiences deformation; a layer of conductor lines configured to detect the change of the conductivity of the pressure sensitive material; the layer of conductor lines includes a plurality of contacting points with the pressure sensitive material; the layer of pressure sensitive material and the conductor lines are configured to be integrated within the display. In other examples, a manufacturing method and a display module are discussed along with the features of the device.Type: ApplicationFiled: April 13, 2015Publication date: October 13, 2016Inventors: Vicente Calvo Alonso, Oiva Sahlsten, Jouko Lång, Kenneth Majander
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Patent number: 9269763Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: GrantFiled: November 8, 2011Date of Patent: February 23, 2016Assignee: Turun YliopistoInventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
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Publication number: 20160049295Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: ApplicationFiled: September 15, 2015Publication date: February 18, 2016Applicant: TURUN YLIOPISTOInventors: Pekka LAUKKANEN, Jouko LANG, Marko PUNKKINEN, Marjukka TUOMINEN, Veikko TUOMINEN, Johnny DAHL, Juhani VAYRYNEN
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Publication number: 20130214331Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.Type: ApplicationFiled: November 8, 2011Publication date: August 22, 2013Applicant: TURUN YLIOPISTOInventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen