Patents by Inventor Jouko Lang

Jouko Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11276989
    Abstract: The present disclosure is related to a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprising a stacked configuration of a plurality of semiconductor layers. At least one of the semiconductor layers is a III-V compound semiconductor layer, and at least one of the III-V compound semiconductor layers has formed thereonto a corresponding crystalline terminating oxide layer, wherein the at least one of the plurality of semiconductor layers interfaces via its crystalline terminating oxide layer to a neighbouring epitaxial semiconductor layer thereto. The semiconductor device is a quantum well device.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: March 15, 2022
    Assignee: Comptek Solutions Oy
    Inventors: Vicente Calvo Alonso, Johnny Dahl, Jouko Lang
  • Publication number: 20210183649
    Abstract: Disclosed is a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device comprises a first III-V compound semiconductor layer having a first material structure, a second semiconductor layer having a second material structure and a third semiconductor layer having a third material structure. An interface between the first semiconductor layer and the second semiconductor layer consists of at least one corresponding crystalline terminating oxide layer of the first semiconductor layer, and an interface between the second semiconductor layer and the third semiconductor layer comprises at least one corresponding crystalline terminating oxide layer of a III-V compound semiconductor layer.
    Type: Application
    Filed: July 27, 2018
    Publication date: June 17, 2021
    Applicant: Comptek Solutions Oy
    Inventors: Johnny DAHL, Jouko LANG, Vicente CALVO ALONSO
  • Patent number: 11037782
    Abstract: Disclosed is a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device comprises a first III-V compound semiconductor layer having a first material structure, a second semiconductor layer having a second material structure and a third semiconductor layer having a third material structure. An interface between the first semiconductor layer and the second semiconductor layer consists of at least one corresponding crystalline terminating oxide layer of the first semiconductor layer, and an interface between the second semiconductor layer and the third semiconductor layer comprises at least one corresponding crystalline terminating oxide layer of a III-V compound semiconductor layer.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: June 15, 2021
    Assignee: Comptek Solutions Oy
    Inventors: Johnny Dahl, Jouko Lang, Vicente Calvo Alonso
  • Patent number: 11031507
    Abstract: Disclosed is a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprises a plurality of layers. The method of fabricating the semiconductor device comprises obtaining a substrate layer, arranging a first corresponding crystalline terminating oxide layer on the substrate layer, arranging at least one semiconductor layer on the first crystalline terminating oxide layer, arranging a second corresponding crystalline terminating oxide layer on the at least one semiconductor layer, and arranging an electrical insulating layer on the second crystalline terminating oxide layer.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: June 8, 2021
    Assignee: Comptek Solutions Oy
    Inventors: Johnny Dahl, Vicente Calvo Alonso, Jouko Lang
  • Publication number: 20210091231
    Abstract: Disclosed is a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprises a plurality of layers. The method of fabricating the semiconductor device comprises obtaining a substrate layer, arranging a first corresponding crystalline terminating oxide layer on the substrate layer, arranging at least one semiconductor layer on the first crystalline terminating oxide layer, arranging a second corresponding crystalline terminating oxide layer on the at least one semiconductor layer, and arranging an electrical insulating layer on the second crystalline terminating oxide layer.
    Type: Application
    Filed: July 27, 2018
    Publication date: March 25, 2021
    Applicant: Comptek Solutions Oy
    Inventors: Johnny DAHL, Vicente CALVO ALONSO, Jouko LANG
  • Publication number: 20200274332
    Abstract: The present disclosure is related to a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprising a stacked configuration of a plurality of semiconductor layers. At least one of the semiconductor layers is a III-V compound semiconductor layer, and at least one of the III-V compound semiconductor layers has formed thereonto a corresponding crystalline terminating oxide layer, wherein the at least one of the plurality of semiconductor layers interfaces via its crystalline terminating oxide layer to a neighbouring epitaxial semiconductor layer thereto. The semiconductor device is a quantum well device.
    Type: Application
    Filed: July 27, 2018
    Publication date: August 27, 2020
    Applicant: Comptek Solutions Oy
    Inventors: Vicente CALVO ALONSO, Johnny DAHL, Jouko LANG
  • Patent number: 10256290
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: April 9, 2019
    Assignee: Comptek Solutions Oy
    Inventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
  • Patent number: 10031605
    Abstract: A display integrated pressure sensor is described. In an example, a device comprises: a display including a plurality of layers; a layer of pressure sensitive material having particles; conductivity of the pressure sensitive material is configured to change when the layer experiences deformation; a layer of conductor lines configured to detect the change of the conductivity of the pressure sensitive material; the layer of conductor lines includes a plurality of contacting points with the pressure sensitive material; the layer of pressure sensitive material and the conductor lines are configured to be integrated within the display. In other examples, a manufacturing method and a display module are discussed along with the features of the device.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: July 24, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vicente Calvo Alonso, Oiva Sahlsten, Jouko Lang, Kenneth Majander
  • Publication number: 20180069074
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Application
    Filed: November 2, 2017
    Publication date: March 8, 2018
    Applicant: Comptek Solutions Oy
    Inventors: Pekka LAUKKANEN, Jouko LANG, Marko PUNKKINEN, Marjukka TUOMINEN, Veikko TUOMINEN, Johnny DAHL, Juhani VAYRYNEN
  • Patent number: 9837486
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: December 5, 2017
    Assignee: Comptek Solutions Oy
    Inventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
  • Patent number: 9269763
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: February 23, 2016
    Assignee: Turun Yliopisto
    Inventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
  • Publication number: 20160049295
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Application
    Filed: September 15, 2015
    Publication date: February 18, 2016
    Applicant: TURUN YLIOPISTO
    Inventors: Pekka LAUKKANEN, Jouko LANG, Marko PUNKKINEN, Marjukka TUOMINEN, Veikko TUOMINEN, Johnny DAHL, Juhani VAYRYNEN
  • Publication number: 20130214331
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Application
    Filed: November 8, 2011
    Publication date: August 22, 2013
    Applicant: TURUN YLIOPISTO
    Inventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen