Patents by Inventor Joungln Yang

Joungln Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8723310
    Abstract: A method of manufacture of an integrated circuit packaging system includes providing a substrate; connecting an integrated circuit die; forming a molding having a temperature-dependent characteristic directly on the top surface of the substrate; and forming a coupling encapsulation having a coupled characteristic different from the temperature-dependent characteristic directly on the molding forms an encapsulation boundary between the coupling encapsulation and the molding.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: May 13, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: YiSu Park, KyungHoon Lee, Joungln Yang, SangMi Park, DaeSik Choi
  • Patent number: 8334601
    Abstract: A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings, the through vias coplanar with the bottom exposed surface of the encapsulant and coplanar with the top exposed surface of the encapsulant.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: December 18, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: DongSam Park, Joungln Yang
  • Patent number: 7863100
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an intermediate package embedded link trace, the intermediate package embedded link trace being encapsulated in an intermediate package mold compound; forming a cap package having a cap interposer; and connecting the intermediate package to the cap package and the base package using the intermediate package embedded link trace.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: January 4, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Joungln Yang, Dongjin Jung, DongSam Park