Abstract: An apparatus to facilitate control flow in a graphics processing system is disclosed. The apparatus includes logic a plurality of execution units to execute single instruction, multiple data (SIMD) and flow control logic to detect a diverging control flow in a plurality of SIMD channels and reduce the execution of the control flow to a subset of the SIMD channels.

Abstract: An apparatus to facilitate control flow in a graphics processing system is disclosed. The apparatus includes logic a plurality of execution units to execute single instruction, multiple data (SIMD) and flow control logic to detect a diverging control flow in a plurality of SIMD channels and reduce the execution of the control flow to a subset of the SIMD channels.

Abstract: An apparatus to facilitate control flow in a graphics processing system is disclosed. The apparatus includes logic a plurality of execution units to execute single instruction, multiple data (SIMD) and flow control logic to detect a diverging control flow in a plurality of SIMD channels and reduce the execution of the control flow to a subset of the SIMD channels.

Abstract: Systems, apparatuses and methods may provide for associating a first instruction pointer with an IF block of a primary IF-ELSE conditional construct associated with a thread and activating a second instruction pointer in response to a dependency associated with the IF block. Additionally, the second instruction pointer may be associated with an ELSE block of the primary IF-ELSE conditional construct. In one example, the IF block and the ELSE block are executed, via the first instruction pointer and the second instruction pointer, one or more of independently from or parallel to one another.

Abstract: An apparatus to facilitate control flow in a graphics processing system is disclosed. The apparatus includes logic a plurality of execution units to execute single instruction, multiple data (SIMD) and flow control logic to detect a diverging control flow in a plurality of SIMD channels and reduce the execution of the control flow to a subset of the SIMD channels.

Abstract: A method, graphics processing unit, and system are described herein. The method for adaptive anisotropic filtering includes calculating a number of ways of anisotropy based on a computed level of detail of a texture map and applying a bilinear low pass filter to a texture map's closest two MIP maps using a processor. An effective number of ways and filter sizes may be computed on each of the closest two closest MIP maps. Additionally, the closest two MIP maps may be sampled at their respective effective number of ways. The method also includes applying a corresponding sized low pass filters to each of the closest two MIP maps, and combining the filtered closest two MIP maps using a weighted sum based on a fractional part of a computed level of detail.

Abstract: Systems, apparatuses and methods may provide for associating a first instruction pointer with an IF block of a primary IF-ELSE conditional construct associated with a thread and activating a second instruction pointer in response to a dependency associated with the IF block. Additionally, the second instruction pointer may be associated with an ELSE block of the primary IF-ELSE conditional construct. In one example, the IF block and the ELSE block are executed, via the first instruction pointer and the second instruction pointer, one or more of independently from or parallel to one another.

Abstract: Embodiments described herein include a graphics processing unit. The graphics processing unit includes a plurality of execution units. The graphics processing unit also includes a plurality of sampler units. Each sampler unit corresponds to a sampler dispatch logic unit and at least one execution unit, and the sampler dispatch logic units are used to network the plurality of sampler units.

Abstract: A method, graphics processing unit, and system are described herein. The method for adaptive anisotropic filtering includes calculating a number of ways of anisotropy based on a computed level of detail of a texture map and applying a bilinear low pass filter to a texture map's closest two MIP maps using a processor. An effective number of ways and filter sizes may be computed on each of the closest two closest MIP maps. Additionally, the closest two MIP maps may be sampled at their respective effective number of ways. The method also includes applying a corresponding sized low pass filters to each of the closest two MIP maps, and combining the filtered closest two MIP maps using a weighted sum based on a fractional part of a computed level of detail.

Abstract: Embodiments described herein include a graphics processing unit. The graphics processing unit includes a plurality of execution units. The graphics processing unit also includes a plurality of sampler units. Each sampler unit corresponds to a sampler dispatch logic unit and at least one execution unit, and the sampler dispatch logic units are used to network the plurality of sampler units.

Abstract: Programmable predication logic in command streamer instruction execution is described. In one example, the invention includes a method that includes receiving batch buffer execution start command at a command streamer, the batch buffer containing executable instructions, determining whether predication has been enabled for the instructions using the start command, if predication has been enabled, then comparing a predication condition to values stored in a predication register, and if the condition is satisfied by the predication register values, then executing the batch buffer.