Abstract: A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.

Abstract: A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.

Abstract: An operational amplifier (1B) amplifies an input signal (Vin) to produce an output signal (Vout), and includes a 3-stage amplifier (1C) including a first amplifier stage (2) receiving the input signal, a second amplifier stage (3) driven by the first amplifier stage (2), and a third amplifier stage (4) driven by the second amplifier stage to produce the output signal. A slew detection current (Idetect) is generated when the input signal (Vin) exceeds a certain magnitude, and is converted to a control signal (41) that operates a switch (MN0) to short-circuit output conductors of the first amplifier stage to prevent signal charge from building up on capacitances associated with the output of the first amplifier stage during slewing. The three stage amplifier can be a chopper-stabilized, notch-filtered amplifier.

Abstract: An operational amplifier (1B) amplifies an input signal (Vin) to produce an output signal (Vout), and includes a 3-stage amplifier (1C) including a first amplifier stage (2) receiving the input signal, a second amplifier stage (3) driven by the first amplifier stage (2), and a third amplifier stage (4) driven by the second amplifier stage to produce the output signal. A slew detection current (Idetect) is generated when the input signal (Vin) exceeds a certain magnitude, and is converted to a control signal (41) that operates a switch (MN0) to short-circuit output conductors of the first amplifier stage to prevent signal charge from building up on capacitances associated with the output of the first amplifier stage during slewing. The three stage amplifier can be a chopper-stabilized, notch-filtered amplifier.

Abstract: An operational amplifier having a wide input common mode voltage range includes first (2) and second (3) differential input transistor pairs coupled to first (14) and second (15) tail current transistors. At least one of the first and second tail current transistor pairs is controlled by a common mode control circuit (4). A gate of the first tail current transistor (14) is coupled to the common mode control circuit (4) to turn the first tail current transistor on and to turn the second tail current transistor off when the common mode input voltage is below a common mode threshold voltage (CMTHR). A folded cascode stage (5) is driven by the first and second differential input transistor pairs.

Abstract: A chopper-stabilized amplifier receiving an input signal includes a first operational transconductance amplifier having an input chopper and an output chopper for chopping an output signal produced by the first operational transconductance amplifier. A switched capacitor notch filter filters the chopped output signal by operating synchronously with the chopping frequency of output chopper to filter ripple voltages that otherwise would be produced by the output chopper. In one embodiment, a second operational transconductance amplifier amplifies the notch filter output. The input signal is fed forward, summed with the output of the second operational transconductance amplifier, and applied to the input of a fourth operational transconductance amplifier. Ripple noise and offset are substantially reduced.

Abstract: An improved method and circuit for reduced settling time in an amplifier are provided. The amplifier comprises a composite amplifier circuit including a first amplifier configured with a second amplifier comprising an integrator circuit. The reduced settling time is facilitated through implementation of a faster path configured between an inverting input terminal of the second amplifier and an output terminal of the first amplifier for current needed by an integrator resistor due to any signal appearing at said inverting input terminal for said high-speed amplifier. The faster path can be realized through the addition of a compensation capacitor between the output terminal of the composite amplifier circuit and the inverting input terminal of the second amplifier. The compensation capacitor can comprise various values depending on any given number of design criteria.

Abstract: An output stage circuit is configured for enabling an output of an amplifier circuit to be pulled upwards and/or downwards to or beyond an upper power supply or below a lower power supply. The exemplary output stage circuit comprises a pair of output transistors configured to provide an output voltage, and a controlled resistive circuit. The controlled resistive element is configured to enhance the gain of the output stage circuit by modifying the dynamic impedance effect of the upper output transistor during pull-up operation, or the lower output transistor during pull-down operation. During normal operation, the controlled resistive element operates with low resistance, e.g., acts as a “short,” but during the pull-up or pull-down operation the controlled resistive element can be configured to add resistance to modify the dynamic impedance of the upper or lower output transistor.

Abstract: A method and circuit for providing a faster overload recovery time for an amplifier circuit is provided. An overload recovery circuit is configured to reduce and/or eliminate the slow tail voltage that may be caused by overloading a composite amplifier, and thus provide a faster overload recovery time over a wide range of feedback components for the composite amplifier. The overload recovery circuit comprises a bypass device configured to provide a path for additional current to flow through during overload conditions, thus creating a “clamping” action with the feedback element of the amplifier circuit. As a result, the current flowing through the bypass device of the amplifier circuit will be large enough to hold an inverting node of the composite amplifier at the common mode voltage, thus reducing the overload recovery time.