Abstract: The present disclosure provides improved genome editing compositions and methods for editing a PD-1 gene. The disclosure further provides genome edited cells for the prevention, treatment, or amelioration of at least one symptom of, a cancer, an infectious disease, an autoimmune disease, an inflammatory disease, or an immunodeficiency.

Abstract: The present disclosure provides improved genome editing compositions and methods for editing a PD-1 gene. The disclosure further provides genome edited cells for the prevention, treatment, or amelioration of at least one symptom of, a cancer, an infectious disease, an autoimmune disease, an inflammatory disease, or an immunodeficiency.

Abstract: A system includes a substance delivery device, a sensor, and a control system. The substance delivery device is configured to deliver a substance. The sensor is configured to generate data associated with the delivery of the substance. The control system is configured to accumulate the generated data including historical data and current data. The control system is configured to determine that the user is currently consuming the substance based at least in part on an analysis of the current data. Responsive to the determination that the user is currently consuming the substance, the control system is configured to determine a current craving score for the user based at least in part on the current data, the historical data, or both. Based at least in part on the current craving score, the control system is configured to determine an intervention.

Abstract: The present disclosure provides improved genome editing compositions and methods for editing a PD-1 gene. The disclosure further provides genome edited cells for the prevention, treatment, or amelioration of at least one symptom of, a cancer, an infectious disease, an autoimmune disease, an inflammatory disease, or an immunodeficiency.

Abstract: The present disclosure provides improved genome editing compositions and methods for editing a PD-1 gene. The disclosure further provides genome edited cells for the prevention, treatment, or amelioration of at least one symptom of, a cancer, an infectious disease, an autoimmune disease, an inflammatory disease, or an immunodeficiency.

Abstract: A system includes, in one aspect, one or more processing devices that perform operations comprising: detecting one or more human objects in images captured by a visual image recording device; obtaining a motion timeseries for each of the detected one or more human objects using the captured images; obtaining a received signal strength (RSS) timeseries for each of the one or more mobile devices, based on received RF signals from the one or more mobile devices; and generating an association between (i) identifying data for a first mobile device of the one or more mobile devices, and (ii) identifying data for one of the one or more human objects representing a first human, wherein the first mobile device has an RSS timeseries that fluctuates at a time period corresponding to movement in the obtained motion timeseries for the one of the one or more human objects representing the first human.

Abstract: A system includes, in one aspect, one or more processing devices that perform operations comprising: detecting one or more human objects in images captured by a visual image recording device; obtaining a motion timeseries for each of the detected one or more human objects using the captured images; obtaining a received signal strength (RSS) timeseries for each of the one or more mobile devices, based on received RF signals from the one or more mobile devices; and generating an association between (i) identifying data for a first mobile device of the one or more mobile devices, and (ii) identifying data for one of the one or more human objects representing a first human, wherein the first mobile device has an RSS timeseries that fluctuates at a time period corresponding to movement in the obtained motion timeseries for the one of the one or more human objects representing the first human.

Abstract: Included are embodiments of a description language program stored in a computing device for updating a first version of a computer program. In at least one embodiment, the first version of the computer program is written in a universal format and the program includes logic configured to receive an updated version of the computer program. Other embodiments include logic configured to retrieve the first version of the computer program and logic configured to translate the updated version of the computer program from a proprietary format to the universal format. Still other embodiments include logic configured to utilize at least one tag to compare the translated updated version of the computer program with the first version of the computer program.

Abstract: Included are embodiments of a description language program stored in a computing device for updating a first version of a computer program. In at least one embodiment, the first version of the computer program is written in a universal format and the program includes logic configured to receive an updated version of the computer program. Other embodiments include logic configured to retrieve the first version of the computer program and logic configured to translate the updated version of the computer program from a proprietary format to the universal format. Still other embodiments include logic configured to utilize the at least one tag to compare the translated updated version of the computer program with the first version of the computer program.

Abstract: Included is a method for testing an assertion written for a logic program that can be simulated in a simulation program. Embodiments of the method include receiving the assertion independent from the logic program and independent from the simulation program, wherein the assertion includes at least one variable from the simulation program and determining the at least one variable in the assertion. Embodiments of the method also include testing the assertion independent from the logic program and the simulation program, wherein testing the assertion includes testing the assertion with at least one value for the at least one variable and determining at least one violation of the assertion.

Abstract: Systems and methods are disclosed for transferring assertions in a software programming language source file to an HDL source file. In one such method, a first source file contains source code in a software programming language and a second source file contains HDL source code translated from the source code in the first source file. The second source file excludes assertions translated from the source code in the first source file. This method comprises the steps of: reading a software assertion from from the first source file; locating a second block within the second source file, where the second block corresponds to a first block that contains the software assertion; mapping the software assertion to a hardware assertion expressed in the HDL; determining a location within the second block for insertion of the hardware assertion; and inserting the hardware assertion at the determined location within the second source file.

Abstract: A chopper-stabilized amplifier receiving an input signal includes a first operational transconductance amplifier having an input chopper and an output chopper for chopping an output signal produced by the first operational transconductance amplifier. A switched capacitor notch filter filters the chopped output signal by operating synchronously with the chopping frequency of output chopper to filter ripple voltages that otherwise would be produced by the output chopper. In one embodiment, a second operational transconductance amplifier amplifies the notch filter output. The input signal is fed forward, summed with the output of the second operational transconductance amplifier, and applied to the input of a fourth operational transconductance amplifier. Ripple noise and offset are substantially reduced.

Abstract: A method is provided for merging assertions in one input file with hardware description language (HDL) code in another input file to produce an HDL output file. One embodiment, among others, comprises the steps of: copying an assertion identified by an assertion identifier from the first input file; locating a matching assertion identifier within a section of the second input file; and merging the assertion with the section of the second input file to produce a section in the HDL output file.

Abstract: An operational amplifier having a wide input common mode voltage range includes first (2) and second (3) differential input transistor pairs coupled to first (14) and second (15) tail current transistors. At least one of the first and second tail current transistor pairs is controlled by a common mode control circuit (4). A gate of the first tail current transistor (14) is coupled to the common mode control circuit (4) to turn the first tail current transistor on and to turn the second tail current transistor off when the common mode input voltage is below a common mode threshold voltage (CMTHR). A folded cascode stage (5) is driven by the first and second differential input transistor pairs.

Abstract: An output stage circuit is configured for enabling an output of an amplifier circuit to be pulled upwards and/or downwards to or beyond an upper power supply or below a lower power supply. The exemplary output stage circuit comprises a pair of output transistors configured to provide an output voltage, and a controlled resistive circuit. The controlled resistive element is configured to enhance the gain of the output stage circuit by modifying the dynamic impedance effect of the upper output transistor during pull-up operation, or the lower output transistor during pull-down operation. During normal operation, the controlled resistive element operates with low resistance, e.g., acts as a “short,” but during the pull-up or pull-down operation the controlled resistive element can be configured to add resistance to modify the dynamic impedance of the upper or lower output transistor.

Abstract: An improved method and circuit for reduced settling time in an amplifier are provided. The amplifier comprises a composite amplifier circuit including a first amplifier configured with a second amplifier comprising an integrator circuit. The reduced settling time is facilitated through implementation of a faster path configured between an inverting input terminal of the second amplifier and an output terminal of the first amplifier for current needed by an integrator resistor due to any signal appearing at said inverting input terminal for said high-speed amplifier. The faster path can be realized through the addition of a compensation capacitor between the output terminal of the composite amplifier circuit and the inverting input terminal of the second amplifier. The compensation capacitor can comprise various values depending on any given number of design criteria.

Abstract: A method and circuit for providing a faster overload recovery time for an amplifier circuit is provided. An overload recovery circuit is configured to reduce and/or eliminate the slow tail voltage that may be caused by overloading a composite amplifier, and thus provide a faster overload recovery time over a wide range of feedback components for the composite amplifier. The overload recovery circuit comprises a bypass device configured to provide a path for additional current to flow through during overload conditions, thus creating a “clamping” action with the feedback element of the amplifier circuit. As a result, the current flowing through the bypass device of the amplifier circuit will be large enough to hold an inverting node of the composite amplifier at the common mode voltage, thus reducing the overload recovery time.

Abstract: An output stage circuit is configured for enabling an output of an amplifier circuit to be pulled upwards and/or downwards to or beyond an upper power supply or below a lower power supply. The exemplary output stage circuit comprises a pair of output transistors configured to provide an output voltage, and a controlled resistive circuit. The controlled resistive element is configured to enhance the gain of the output stage circuit by modifying the dynamic impedance effect of the upper output transistor during pull-up operation, or the lower output transistor during pull-down operation. During normal operation, the controlled resistive element operates with low resistance, e.g., acts as a “short,” but during the pull-up or pull-down operation the controlled resistive element can be configured to add resistance to modify the dynamic impedance of the upper or lower output transistor.