Abstract: The present invention provides engineered glycosyltransferase (GT) enzymes, polypeptides having GT activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention provides engineered sucrose synthase (SuS) enzymes, polypeptides having SuS activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention also provides compositions comprising the GT enzymes and methods of using the engineered GT enzymes to make products with ?-glucose linkages. The present invention further provides compositions and methods for the production of rebaudiosides (e.g., rebaudioside M, rebaudioside A, rebaudioside I, and rebaudioside D). The present invention also provides compositions comprising the SuS enzymes and methods of using them. Methods for producing GT and SuS enzymes are also provided.

Abstract: The present invention provides engineered tyrosine ammonia-lyase (TAL) polypeptides and compositions thereof. In some embodiments, the engineered TAL polypeptides have been optimized to provide enhanced catalytic activity and enhanced acid stability, while reducing sensitivity to proteolysis and increasing tolerance to acidic pH levels. The invention also provides methods for utilization of the compositions comprising the engineered TAL polypeptides for therapeutic and industrial purposes.

Abstract: The present invention provides engineered tyrosine ammonia-lyase (TAL) polypeptides and compositions thereof. In some embodiments, the engineered TAL polypeptides have been optimized to provide enhanced catalytic activity while reducing sensitivity to proteolysis and increasing tolerance to acidic pH levels. The invention also provides methods for utilization of the compositions comprising the engineered TAL polypeptides for therapeutic and industrial purposes.

Abstract: The present invention provides engineered glycosyltransferase (GT) enzymes, polypeptides having GT activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention provides engineered sucrose synthase (SuS) enzymes, polypeptides having SuS activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention also provides compositions comprising the GT enzymes and methods of using the engineered GT enzymes to make products with ?-glucose linkages. The present invention further provides compositions and methods for the production of rebaudiosides (e.g., rebaudioside M, rebaudioside A, rebaudioside I, and rebaudioside D). The present invention also provides compositions comprising the SuS enzymes and methods of using them. Methods for producing GT and SuS enzymes are also provided.

Abstract: The present invention provides engineered tyrosine ammonia-lyase (TAL) polypeptides and compositions thereof. In some embodiments, the engineered TAL polypeptides have been optimized to provide enhanced catalytic activity and enhanced acid stability, while reducing sensitivity to proteolysis and increasing tolerance to acidic pH levels. The invention also provides methods for utilization of the compositions comprising the engineered TAL polypeptides for therapeutic and industrial purposes.

Abstract: The present invention provides engineered glycosyltransferase (GT) enzymes, polypeptides having GT activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention provides engineered sucrose synthase (SuS) enzymes, polypeptides having SuS activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. The present invention also provides compositions comprising the GT enzymes and methods of using the engineered GT enzymes to make products with ?-glucose linkages. The present invention further provides compositions and methods for the production of rebaudiosides (e.g., rebaudioside M, rebaudioside A, rebaudioside I, and rebaudioside D). The present invention also provides compositions comprising the SuS enzymes and methods of using them. Methods for producing GT and SuS enzymes are also provided.

Abstract: Methods of treatment of cancer are provided. In particular, methods of treatment of low-grade serous ovarian cancers by inhibiting signaling of an EGFR family member are provided.

Abstract: An FET transistor has a gate disposed between a source and a drain; a gate dielectric layer disposed underneath the gate; and a spacer on a side of the gate. The gate dielectric layer is conventional oxide and the spacer has a reduced dielectric constant (k). The reduced dielectric constant (k) may be less than 3.85, or it may be less than 7.0 (˜nitride), but greater than 3.85 (˜oxide). Preferably, the spacer comprises a material which can be etched selectively to the gate dielectric layer. The spacer may be porous, and a thin layer is deposited on the porous spacer to prevent moisture absorption. The spacer may comprise a material selected from the group consisting of Black Diamond, Coral, TERA and Blok type materials. Pores may be formed in the spacer material by exposing the spacers to an oxygen plasma.

Abstract: A method and structure for protecting a flowable oxide insulator in a semiconductor by oxidizing sidewalls of the FOX insulator, optionally nitridizing the oxidized FOX sidewalls, and then covering all surfaces of a trough or plurality of troughs in the FOX insulator, including the sidewalls, with a conductive secondary protective layer. In a multiple layer damascene structure, the surface of the FOX insulator is also oxidized, an additional oxide layer is deposited thereon, and a nitride layer deposited on the oxide layer. Then steps are repeated to obtain a comparable damascene structure. The materials can vary and each damascene layer may be either a single damascene or a dual damascene layer.

Abstract: Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. By performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.

Abstract: Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. A first protective layer is formed in situ on the dielectric material, such as by exposing the material to an oxygen-containing or flourine containing plasma. Also, by performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. The first protective layer and the surface protective covering can be formed by essentially identical processes.

Abstract: Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. By performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.

Abstract: Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. By performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.

Abstract: Poorly adherent layers such as silicon nitride and silicon dioxide exhibit improved adhesion to copper member by providing an intervening germanium-containing layer. The germanium-containing layer is copper germanide, germanium oxide, germanium nitride or combinations thereof. The germanium-containing layer enhances the adhesion such that the poorly adherent layer is less susceptible to delamination from the copper member.

Abstract: A method and structure for protecting a flowable oxide insulator in a semiconductor by oxidizing sidewalls of the FOX insulator, optionally nitridizing the oxidized FOX sidewalls, and then covering all surfaces of a trough or plurality of troughs in the FOX insulator, including the sidewalls, with a conductive secondary protective layer. In a multiple layer damascene structure, the surface of the FOX insulator is also oxidized, an additional oxide layer is deposited thereon, and a nitride layer deposited on the oxide layer. Then steps are repeated to obtain a comparable damascene structure. The materials can vary and each damascene layer may be either a single damascene or a dual damascene layer.

Abstract: A method and structure for protecting a flowable oxide insulator in a semiconductor by oxidizing sidewalls of the FOX insulator, optionally nitridizing the oxidized FOX sidewalls, and then covering all surfaces of a trough or plurality of troughs in the FOX insulator, including the sidewalls, with a conductive secondary protective layer. In a multiple layer damascene structure, the surface of the FOX insulator is also oxidized, an additional oxide layer is deposited thereon, and a nitride layer deposited on the oxide layer. Then steps are repeated to obtain a comparable damascene structure. The materials can vary and each damascene layer nay be either a single damascene or a dual damascene layer.