Abstract: The present invention is directed to an automated method of controlling photoresist develop time to control critical dimensions, and a system for accomplishing same. In one embodiment, the method comprises measuring a critical dimension of each of a plurality of features formed in a layer of photoresist, providing the measured critical dimensions of the features, in the layer of photoresist to a controller that determines, based upon the measured critical dimensions, a duration of a photoresist develop process to be performed on a layer of photoresist formed above a subsequently processed wafer, and performing a photoresist develop process on the subsequently processed wafer for the determined duration.

Abstract: The present invention is generally directed to a method of modeling and controlling the endpoint of chemical mechanical polishing operations performed on a process layer, and a system for accomplishing same. In one illustrative embodiment, the method comprises providing a first wafer having a process layer formed thereabove, determining a duration of an endpoint polishing process performed on the process layer on the wafer, providing a second wafer having a process layer formed thereabove, and modifying at least one parameter of the endpoint polishing process to be performed on the process layer formed above the second wafer based upon a variance between the determined duration of the endpoint polishing process performed on the process layer on the first wafer and a target value for the duration of the endpoint polishing process.

Abstract: A method for controlling critical dimensions of a feature formed on a semiconductor wafer includes illuminating the wafer; measuring light reflected off the wafer to generate a profile trace; comparing the profile trace to a target profile trace; and modifying an operating recipe of a processing tool used to form the feature based on a deviation between the profile trace and the target profile trace. A processing line includes a processing tool, a scatterometer, and a process controller. The processing tool is adapted to form a feature on a semiconductor wafer in accordance with an operating recipe. The scatterometer is adapted to receive the wafer. The scatterometer includes a light source adapted to illuminate the wafer and a light detector adapted to measure light from the light source reflected off the wafer to generate a profile trace.

Abstract: A method of compensating for across-wafer variations in photoresist thickness is provided. The method comprises providing a wafer having a process layer formed there-above, forming a layer of photoresist above the process layer, measuring a thickness of the layer of photoresist at a plurality of locations to result in a plurality of thickness measurements, providing the thickness measurements to a controller that determines, based upon the thickness measurements, an exposure dose of an exposure process to be performed on the layer of photoresist, and performing the exposure process on the layer of photoresist using the determined exposure dose. This exposure dose may be varied on a flash-by-flash basis as the stepper tool “steps” across the surface of wafers. That is, the exposure dose for a group of flashes, or for each flash, may be varied in response to the thickness measurements.

Abstract: A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a plurality of semiconductor devices formed above at least one semiconducting substrate, providing the determined electrical performance characteristics to a controller that determines, based upon the determined electrical characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on at least one subsequently processed substrate, and performing the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates.

Abstract: A technique for processing a wafer in a semiconductor manufacturing process are disclosed. The method comprises first collecting a set of processing rate data from a multi-station processing tool, the set including process rate data from at least two stations in the processing tool. The collected processing rate data is then communicated to a controller that autonomously compares the processing rate data to determine whether to adjust a process parameter. The method then adjusts the process parameter for at least one station to match the process endpoint for the at least one station.

Abstract: A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a plurality of semiconductor devices formed above at least one semiconducting substrate, providing the determined electrical performance characteristics to a controller that determines, based upon the determined electrical characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on at least one subsequently processed substrate, and performing the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates.