Patents by Inventor Joydeep Chowdhury

Joydeep Chowdhury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140060050
    Abstract: Systems and methods for transforming solar energy into mechanical and/or electrical energy by using an ORC fluid in an ORC cycle configuration. The ORC cycle configuration includes a heat source that vaporizes the ORC fluid and an expander that expands the vaporized ORC fluid to produce the energy.
    Type: Application
    Filed: March 30, 2012
    Publication date: March 6, 2014
    Applicant: NUOVO PIGNONE S.p.A.
    Inventors: Bhaskara Kosamana, Joydeep Chowdhury, Arunachalam Chettiyar, Saravanaram T., Rakesh Govindasamy
  • Patent number: 8599855
    Abstract: Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: December 3, 2013
    Assignee: Cisco Technology, Inc.
    Inventors: William Lee, Michael Wright, Joydeep Chowdhury, Sriram Haridas, Martin Hughes
  • Publication number: 20110064081
    Abstract: Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    Type: Application
    Filed: November 16, 2010
    Publication date: March 17, 2011
    Applicant: Cisco Technology, Inc.
    Inventors: William Lee, Michael Wright, Joydeep Chowdhury, Sriram Haridas, Martin Hughes
  • Patent number: 7848332
    Abstract: Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: December 7, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: William Lee, Michael Wright, Joydeep Chowdhury, Sriram Haridas, Martin Hughes
  • Patent number: 7555582
    Abstract: Portable USB memory modules or devices and methods for using such devices are disclosed herein. In one embodiment, a portable memory module can include a housing having a CompactFlash card form factor and one or more flash memory devices carried by the housing. The portable memory module can also include a USB controller carried by the housing and coupled to the one or more flash memory devices. The portable memory module can further include a connector including a first portion coupled to the controller and a second portion configured to mate with a host device. In several embodiments, the connector includes a plurality of pins to transfer signals to and from the memory module. The pins are configured to mate with a fifty pin socket on the host device.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: June 30, 2009
    Inventors: Grady David Lambert, Joydeep Chowdhury, Carson Stuart, Ryan McDaniel
  • Publication number: 20080147899
    Abstract: Portable USB memory modules or devices and methods for using such devices are disclosed herein. In one embodiment, a portable memory module can include a housing having a CompactFlash card form factor and one or more flash memory devices carried by the housing. The portable memory module can also include a USB controller carried by the housing and coupled to the one or more flash memory devices. The portable memory module can further include a connector including a first portion coupled to the controller and a second portion configured to mate with a host device. In several embodiments, the connector includes a plurality of pins to transfer signals to and from the memory module. The pins are configured to mate with a fifty pin socket on the host device.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 19, 2008
    Applicants: SMART Modular Technologies, Inc., Cisco Systems, Inc.
    Inventors: Grady D. Lambert, Joydeep Chowdhury, Carson R. Stuart, Ryan C. McDaniel
  • Publication number: 20060104268
    Abstract: Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    Type: Application
    Filed: November 15, 2004
    Publication date: May 18, 2006
    Inventors: William Lee, Michael Wright, Joydeep Chowdhury, Sriram Haridas, Martin Hughes