Patents by Inventor Joze Eura Antol

Joze Eura Antol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7888257
    Abstract: It has been found that integrated packages having dies with at least 10 bonding pads separated by a pitch of 65 ?m or less are susceptible to corrosion upon wire bonding to these pads and subsequent encapsulation in a passivating material. In particular, crevices are potentially formed between the bonding wire and bonding pad that are not passivated and that promote corrosion. Avoidance of crevice formation through, for example, appropriately choosing the bonding pad and wire configuration substantially avoids such corrosion.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: February 15, 2011
    Assignee: Agere Systems Inc.
    Inventors: Joze Eura Antol, John William Osenbach, Ronald James Weachock
  • Patent number: 7727781
    Abstract: Typical testing of solder joints, (e.g. joints at printed circuit board pads) has not proven totally predictive of the ultimate performance of such joints. It has been found that this lack of reliability is, at least in part, due to the tendency during testing for these pads to lose adhesion to, or delaminate from, the underlying substrate. In contrast, such occurrence is not typical of phenomena induced during typical device usage. To remove this source of unreliability, a test structure is made together with the manufacturing device lot. The same pad processing is used and the pad size is substantially enlarged in the test structure. The test structure is employed to predict performance of devices in the lot and then the lot is processed accordingly.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: June 1, 2010
    Assignee: Agere Systems Inc.
    Inventors: Joze Eura Antol, Kishor V. Desai, John William Osenbach, Brian Thomas Vaccaro
  • Publication number: 20100022034
    Abstract: Typical testing of solder joints, (e.g. joints at printed circuit board pads) has not proven totally predictive of the ultimate performance of such joints. It has been found that this lack of reliability is, at least in part, due to the tendency during testing for these pads to lose adhesion to, or delaminate from, the underlying substrate. In contrast, such occurrence is not typical of phenomena induced during typical device usage. To remove this source of unreliability, a test structure is made together with the manufacturing device lot. The same pad processing is used and the pad size is substantially enlarged in the test structure. The test structure is employed to predict performance of devices in the lot and then the lot is processed accordingly.
    Type: Application
    Filed: July 22, 2008
    Publication date: January 28, 2010
    Inventors: Joze Eura Antol, Kishor V. Desai, John William Osenbach, Brian Thomas Vaccaro
  • Publication number: 20090098687
    Abstract: It has been found that integrated packages having dies with at least 10 bonding pads separated by a pitch of 65 ?m or less are susceptible to corrosion upon wire bonding to these pads and subsequent encapsulation in a passivating material. In particular, crevices are potentially formed between the bonding wire and bonding pad that are not passivated and that promote corrosion. Avoidance of crevice formation through, for example, appropriately choosing the bonding pad and wire configuration substantially avoids such corrosion.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 16, 2009
    Inventors: Joze Eura Antol, John William Osenbach, Ronald James Weachock