Patents by Inventor Jozef Adut

Jozef Adut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8446203
    Abstract: A low side clamp circuit has a control portion, a sense portion, and a clamp portion. When the sense portion detects that the input voltage of an output stage of a buffer has gone below a threshold voltage, it triggers the control portion to quickly turn on a clamp transistor (in the clamp portion) to clamp the output voltage to the clamp voltage. The control portion and sense portion have cross-coupled transistors that create increased speed and a sharp response with little or no voltage offset with a wide range of load currents. A clamp current source draws current through a resistor coupled in series between the base of the output transistor in the control portion and the collector of the output transistor in the sense portion. The clamp current is set to ClLo/R, where ClLo is the clamp voltage. A high side clamp is also described.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: May 21, 2013
    Assignee: Linear Technology Corporation
    Inventor: Jozef Adut
  • Patent number: 7514997
    Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 7, 2009
    Assignee: LeCroy Corporation
    Inventor: Jozef Adut
  • Publication number: 20080061877
    Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.
    Type: Application
    Filed: September 11, 2006
    Publication date: March 13, 2008
    Applicant: LeCroy Corporation
    Inventor: Jozef Adut
  • Patent number: 7026854
    Abstract: The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements. The present invention provides circuitry comprising a voltage supply (308) and an output node (302). A transistor (304) is provided. A first resistive element (312) is coupled to the voltage supply, while a second resistive element (314)—having a resistance value equal to that of the first resistive element—is coupled between a second terminal of the transistor and the output node. A first diode (310) is coupled to the first resistive element and to a first terminal of the transistor. A clamping system (316) is coupled to the transistor, and a current limiting system (318) is coupled to the clamping system.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: April 11, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Luthuli Edem Dake, Jozef Adut
  • Patent number: 6992523
    Abstract: A current monitor (360) having a high performance, simple, and cost effective design that is independent of process, temperature and voltage is disclosed herein. The current monitor (360) includes a sensing transistor (340) that couples to the main transistor (312) of an adjoining voltage regulator. Specifically, the control and source nodes of each transistor couple to each other, respectively. The size of the main transistor (312) is a predetermined multiple integer n of the size of the sensing transistor. A first resistor (RS3) couples between a supply voltage and the drain node of the main transistor (312). A second resistor (RS1) couples between a supply voltage and the drain node of the sensing transistor (340), wherein the size of the second resistor (RS1) is equal to the size of the first resistor (RS3) multiplied by the predetermined multiple integer n.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: January 31, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Luthuli Edem Dake, Jozef Adut
  • Publication number: 20050258876
    Abstract: The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements. The present invention provides circuitry comprising a voltage supply (308) and an output node (302). A transistor (304) is provided. A first resistive element (312) is coupled to the voltage supply, while a second resistive element (314)—having a resistance value equal to that of the first resistive element—is coupled between a second terminal of the transistor and the output node. A first diode (310) is coupled to the first resistive element and to a first terminal of the transistor. A clamping system (316) is coupled to the transistor, and a current limiting system (318) is coupled to the clamping system.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Luthuli Dake, Jozef Adut
  • Publication number: 20050237087
    Abstract: A current monitor (360) having a high performance, simple, and cost effective design that is independent of process, temperature and voltage is disclosed herein. The current monitor (360) includes a sensing transistor (340) that couples to the main transistor (312) of an adjoining voltage regulator. Specifically, the control and source nodes of each transistor couple to each other, respectively. The size of the main transistor (312) is a predetermined multiple integer n of the size of the sensing transistor. A first resistor (RS3) couples between a supply voltage and the drain node of the main transistor (312). A second resistor (RS1) couples between a supply voltage and the drain node of the sensing transistor (340), wherein the size of the second resistor (RS1) is equal to the size of the first resistor (RS3) multiplied by the predetermined multiple integer n.
    Type: Application
    Filed: April 27, 2004
    Publication date: October 27, 2005
    Inventors: Luthuli Dake, Jozef Adut