Patents by Inventor Jozef Jacobus Verlinden

Jozef Jacobus Verlinden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080043545
    Abstract: A memory controller for a multiple data rate RAM memory module is provided. Said controller comprises a PLL unit (PLL) for generating different clock phases (clk, clk90, clk180) from a reference clock (ref clk). In addition, a controllable delay unit (CDU) for delaying a strobe signal (dqs) is provided.
    Type: Application
    Filed: April 26, 2005
    Publication date: February 21, 2008
    Inventors: Jan Vink, Jozef Jacobus Verlinden