Patents by Inventor Jr-Yu CHEN
Jr-Yu CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240363452Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.Type: ApplicationFiled: July 9, 2024Publication date: October 31, 2024Inventors: Jung-Hau Shiu, Ching-Yu Chang, Jei Ming Chen, Jr-Yu Chen, Tze-Liang Lee
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Patent number: 12087644Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.Type: GrantFiled: October 4, 2021Date of Patent: September 10, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jung-Hau Shiu, Ching-Yu Chang, Jei Ming Chen, Jr-Yu Chen, Tze-Liang Lee
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Publication number: 20240282577Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.Type: ApplicationFiled: April 29, 2024Publication date: August 22, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Yu CHEN, Chih-Cheng LIU, Yi-Chen KUO, Jr-Hung LI, Tze-Liang LEE, Ming-Hui WENG, Yahru CHENG
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Publication number: 20240274527Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.Type: ApplicationFiled: March 26, 2024Publication date: August 15, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
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Publication number: 20240258390Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: ApplicationFiled: April 15, 2024Publication date: August 1, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Patent number: 11984485Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: GrantFiled: March 3, 2022Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Publication number: 20220367293Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.Type: ApplicationFiled: October 4, 2021Publication date: November 17, 2022Inventors: Jung-Hau Shiu, Ching-Yu Chang, Jei Ming Chen, Jr-Yu Chen, Tze-Liang Lee
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Publication number: 20220238669Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: ApplicationFiled: March 3, 2022Publication date: July 28, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Patent number: 11271083Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: GrantFiled: March 2, 2020Date of Patent: March 8, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Patent number: 10978341Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.Type: GrantFiled: December 5, 2019Date of Patent: April 13, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Sun, Han-Ti Hsiaw, Yi-Wei Chiu, Kuan-Cheng Wang, Shin-Yeu Tsai, Jr-Yu Chen, Wen-Cheng Wu
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Publication number: 20210098584Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: ApplicationFiled: March 2, 2020Publication date: April 1, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Publication number: 20200111705Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Inventors: Chih-Hung Sun, Han-Ti Hsiaw, Yi-Wei Chiu, Kuan-Cheng Wang, Shin-Yeu Tsai, Jr-Yu Chen, Wen-Cheng Wu
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Patent number: 10510593Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.Type: GrantFiled: January 12, 2018Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Sun, Han-Ti Hsiaw, Yi-Wei Chiu, Kuan-Cheng Wang, Shin-Yeu Tsai, Jr-Yu Chen, Wen-Cheng Wu
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Publication number: 20180151425Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.Type: ApplicationFiled: January 12, 2018Publication date: May 31, 2018Inventors: Chih-Hung Sun, Han-Ti Hsiaw, Yi-Wei Chiu, Kuan-Cheng Wang, Shin-Yeu Tsai, Jr-Yu Chen, Wen-Cheng Wu
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Patent number: 9881834Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.Type: GrantFiled: March 17, 2017Date of Patent: January 30, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Sun, Han-Ti Hsiaw, Yi-Wei Chiu, Kuan-Cheng Wang, Shin-Yeu Tsai, Jr-Yu Chen, Wen-Cheng Wu
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Patent number: 9396936Abstract: A method for growing aluminum indium nitride (AlInN) films on silicon substrates comprises several steps: firstly, arranging a silicon substrate in a reaction chamber; secondly, providing multiple reaction gases in the reaction chamber, wherein the reaction gases include aluminum precursors, indium precursors and nitrogen-containing gases; finally, dynamically adjusting flow rates of the reaction gases and directly growing an AlInN layer on the silicon substrate via a crystal growth process. By directly forming an AlInN layer on the silicon substrate, lattice matching is increased, residual thermal stress is reduced and film quality is improved. In addition, fabrication process is simplified and thus cost is reduced.Type: GrantFiled: June 13, 2014Date of Patent: July 19, 2016Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Li Chang, Jr-Yu Chen, Wei-Chun Chen, Pei-Yin Lin
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Patent number: 9217207Abstract: The present invention is directed to a method of growing thin film diamond. Since there are micro-grooves formed between internal grains of the heterogeneous substrate during lateral epitaxy growth, diamond seeds are allowed to be embedded in the micro-grooves; surface damage caused by scratching method or seeding method also can be prevented. As a result, a continuous diamond thin film with uniform thickness and high quality can be obtained.Type: GrantFiled: July 29, 2013Date of Patent: December 22, 2015Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Li Chang, Yu-Chang Chen, Jr-Yu Chen
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Publication number: 20150235837Abstract: A method for growing aluminum indium nitride (AlInN) films on silicon substrates comprises several steps: firstly, arranging a silicon substrate in a reaction chamber; secondly, providing multiple reaction gases in the reaction chamber, wherein the reaction gases include aluminum precursors, indium precursors and nitrogen-containing gases; finally, dynamically adjusting flow rates of the reaction gases and directly growing an AlInN layer on the silicon substrate via a crystal growth process. By directly forming an AlInN layer on the silicon substrate, lattice matching is increased, residual thermal stress is reduced and film quality is improved. In addition, fabrication process is simplified and thus cost is reduced.Type: ApplicationFiled: June 13, 2014Publication date: August 20, 2015Inventors: Li CHANG, Jr-Yu CHEN, Wei-Chun CHEN, Pei-Yin LIN
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Publication number: 20140209014Abstract: The present invention is directed to a method of growing thin film diamond. Since there are micro-grooves formed between internal grains of the heterogeneous substrate during lateral epitaxy growth, diamond seeds are allowed to be embedded in the micro-grooves; surface damage caused by scratching method or seeding method also can be prevented. As a result, a continuous diamond thin film with uniform thickness and high quality can be obtained.Type: ApplicationFiled: July 29, 2013Publication date: July 31, 2014Applicant: National Chiao Tung UniversityInventors: Li CHANG, Yu-Chang CHEN, Jr-Yu CHEN