Patents by Inventor Jsohua M. Conner

Jsohua M. Conner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030028743
    Abstract: A processor is provided that has a data memory that may be addressed as a dual memory space in one mode and as a single linear memory space in another mode. The memory may permit dual concurrent operand fetches from the data memory when DSP instructions are processed. The memory may then dynamically permit the same memory to be accessed as a single linear memory address space for non-DSP instructions.
    Type: Application
    Filed: June 1, 2001
    Publication date: February 6, 2003
    Inventors: Michael Catherwood, Joseph W. Triece, Michael Pyska, Jsohua M. Conner