Abstract: Some embodiments relate to a semiconductor device disposed on a semiconductor substrate. A dielectric structure is arranged over the semiconductor substrate. First and second metal vias are disposed in the dielectric structure and spaced laterally apart from one another. First and second metal lines are disposed in the dielectric structure and have nearest neighboring sidewalls that are spaced laterally apart from one another by a portion of the dielectric structure. The first and second metal lines contact upper portions of the first and second metal vias, respectively. First and second air gaps are disposed in the portion of the dielectric structure. The first and second air gaps are proximate to nearest neighboring sidewalls of the first and second metal lines, respectively.

Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

Abstract: A manufacturing method of a semiconductor structure is provided. The manufacturing method of the semiconductor structure includes the following steps: providing a semiconductor substrate, wherein the semiconductor substrate has a first region and a second region surrounding the first region; forming a gate stack and a dummy gate stack in the first region, wherein the dummy gate stack surrounds the gate stack; forming an oxide layer on an exterior wall and a top surface of the dummy gate stack; forming a dummy conductive layer on the gate stack, the dummy gate stack and the oxide layer, wherein the dummy conductive layer has a concave bowl-shaped top surface in the first region; and performing a chemical mechanical polishing (CMP) process on the dummy conductive layer.

Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole, an interlayer dielectric, a liner layer and a conductor. The through silicon via hole is formed in the substrate. The interlayer dielectric is formed on the substrate. The interlayer dielectric defines an opening corresponding to the through silicon via hole. The interlayer dielectric comprises a bird beak portion near the through silicon via hole. The liner layer is formed on a bottom and a sidewall of the through silicon via hole. The conductor is filled in the through silicon via hole and the opening.

Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole, an interlayer dielectric, a liner layer and a conductor. The through silicon via hole is formed in the substrate. The interlayer dielectric is formed on the substrate. The interlayer dielectric defines an opening corresponding to the through silicon via hole. The interlayer dielectric comprises a bird beak portion near the through silicon via hole. The liner layer is formed on a bottom and a sidewall of the through silicon via hole. The conductor is filled in the through silicon via hole and the opening.

Abstract: The present invention provides a method for fabricating a capacitor structure, including the steps of: providing a substrate; forming a first conductive structure and a dielectric structure over the substrate, wherein the first conductive structure is enclosed by the dielectric structure; forming a first trench in the dielectric structure, so that a first surface of the first conductive structure is exposed through the first trench; forming a first capacitor electrode and a capacitor dielectric layer on a bottom and a sidewall of the first trench and on a top surface of the dielectric structure, so that the first capacitor electrode is electrically contacted with the first surface of the first conductive structure; and removing the first capacitor electrode and the capacitor dielectric layer on the top surface of the dielectric structure; forming a second capacitor electrode on a surface of the capacitor dielectric layer. A capacitor structure is also provided.

Abstract: The present invention relates to methods and pharmaceutical compositions for treating obesity or obesity-related disorders in a subject suffering from or predisposed to developing obesity or an obesity-related disorder, or for inhibiting the infectivity of HIV, by administering oleuropein, an analogue or derivative thereof, or the major metabolites of oleuropein including oleuropein aglycone, hydroxytyrosol, and elenolic acid or their analogues, or derivatives thereof, an iridoid glycoside, or a secoiridoid glycoside or analogues or derivatives thereof, or any combination of the foregoing including olive leave extract. The invention also relates to methods for screening/diagnosing a subject having, or predisposed to having obesity or a related disorder by measuring the expression profiles of an adipogenic gene selected from PPAR?2, LPL and ?P2 gene and gene product, or other adipogenic, lipogenic, or lipolytic genes and gene products in an individual.

Abstract: The present invention relates to methods and pharmaceutical compositions for treating obesity or obesity-related disorders in a subject suffering from or predisposed to developing obesity or an obesity-related disorder, or for inhibiting the infectivity of HIV, by administering oleuropein, an analogue or derivative thereof, or the major metabolites of oleuropein including oleuropein aglycone, hydroxytyrosol, and elenolic acid or their analogues, or derivatives thereof, an iridoid glycoside, or a secoiridoid glycoside or analogues or derivatives thereof, or any combination of the foregoing including olive leave extract. The invention also relates to methods for screening/diagnosing a subject having, or predisposed to having obesity or a related disorder by measuring the expression profiles of an adipogenic gene selected from PPAR?2, LPL and ?P2 gene and gene product, or other adipogenic, lipogenic, or lipolytic genes and gene products in an individual.

Abstract: A capacitor structure includes a first conductive structure, a dielectric structure, a first capacitor electrode, a capacitor dielectric layer, and a second capacitor electrode. The first conductive structure is disposed over a substrate. The dielectric structure is disposed over the substrate and partially enclosing the first conductive structure. The dielectric structure has a trench. A first surface of the first conductive structure is exposed through the trench of the dielectric structure. The first capacitor electrode is disposed on a bottom and a sidewall of the trench. The first capacitor electrode is electrically contacted with the first surface of the first conductive structure. The capacitor dielectric layer is disposed on a surface of the first capacitor electrode. The second capacitor electrode is disposed on a surface of the capacitor dielectric layer and filled in the trench.

Abstract: The present invention relates to methods and pharmaceutical compositions for treating obesity or obesity-related disorders in a subject suffering from or predisposed to developing obesity or an obesity-related disorder, or for inhibiting the infectivity of HIV, by administering oleuropein, an analogue or derivative thereof, or the major metabolites of oleuropein including oleuropein aglycone, hydroxytyrosol, and elenolic acid or their analogues, or derivatives thereof, an iridoid glycoside, or a secoiridoid glycoside or analogues or derivatives thereof, or any combination of the foregoing including olive leave extract. The invention also relates to methods for screening/diagnosing a subject having, or predisposed to having obesity or a related disorder by measuring the expression profiles of an adipogenic gene selected from PPAR?2, LPL and ?P2 gene and gene product, or other adipogenic, lipogenic, or lipolytic genes and gene products in an individual.

Abstract: The present invention relates to methods and pharmaceutical compositions for treating obesity or obesity-related disorders in a subject suffering from or predisposed to developing obesity or an obesity-related disorder, or for inhibiting the infectivity of HIV, by administering oleuropein, an analogue or derivative thereof, or the major metabolites of oleuropein including oleuropein aglycone, hydroxytyrosol, and elenolic acid or their analogues, or derivatives thereof, an iridoid glycoside, or a secoiridoid glycoside or analogues or derivatives thereof, or any combination of the foregoing including olive leave extract. The invention also relates to methods for screening/diagnosing a subject having, or predisposed to having obesity or a related disorder by measuring the expression profiles of an adipogenic gene selected from PPAR?2, LPL and ?P2 gene and gene product, or other adipogenic, lipogenic, or lipolytic genes and gene products in an individual.

Abstract: The present invention relates to methods and pharmaceutical compositions for treating obesity or obesity-related disorders in a subject suffering from or predisposed to developing obesity or an obesity-related disorder, or for inhibiting the infectivity of HIV, by administering oleuropein, an analogue or derivative thereof, or the major metabolites of oleuropein including oleuropein aglycone, hydroxytyrosol, and elenolic acid or their analogues, or derivatives thereof, an iridoid glycoside, or a secoiridoid glycoside or analogues or derivatives thereof, or any combination of the foregoing including olive leave extract. The invention also relates to methods for screening/diagnosing a subject having, or predisposed to having obesity or a related disorder by measuring the expression profiles of an adipogenic gene selected from PPAR?2, LPL and ?P2 gene and gene product, or other adipogenic, lipogenic, or lipolytic genes and gene products in an individual.