Abstract: A display apparatus includes a substrate; a first insulating layer formed on the substrate and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features; a first storage electrode overlaying the upper surface and a side surface of the first insulating layer and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features, each concave feature of the first storage electrode overlying at least one respective concave feature of the first insulating layer, each convex feature of the first storage electrode overlying at least one respective convex feature of the first insulating layer; a second insulating layer formed on the first storage electrode; and a second storage electrode formed on the second insulating layer which separates the second storage electrode from the underlying first storage electrode.

Abstract: A thin film transistor display substrate comprises a base substrate on which a pixel area including a first reflection area and a second reflection area is defined. A gate line formed on the base substrate and a data line formed on the base substrate. The data line is insulated from and intersected with the gate line to define the pixel area. A thin film transistor is formed in the pixel area and connected to the gate line and the data line. A first reflection layer is formed on the base substrate and corresponds to the first reflection area. A color filter is formed on the first reflection layer and corresponds to the pixel area. A second reflection layer is formed on the color filter and corresponds to the second reflection area. A pixel electrode is formed on the color filter and is electrically connected to the thin film transistor.

Abstract: According to an embodiment, the method of manufacturing a thin film transistor array panel includes forming a gate wire, a data wire, and a thin film transistor on a substrate and depositing an organic material layer on the gate wire, the data wire, and the thin film transistor. The method further includes forming an optical pattern on the upper surface of the organic material layer, depositing a reflecting electrode layer on the organic material layer, etching the reflecting electrode layer, etching the organic material layer after etching the reflecting electrode layer, and forming a pixel electrode on the reflecting electrode layer. Accordingly, the optical pattern on the upper surface of organic material may be transcribed to the reflecting electrode layer without damage and with clarity.

Abstract: An electrophoretic display includes a thin film transistor array panel including a first substrate, a gate line on the first substrate having a gate electrode, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, a data line including a source electrode and a drain electrode on the semiconductor or the gate insulating layer, a passivation layer covering the data line and having a first contact hole exposing the drain electrode, a storage electrode on the passivation layer, a color filter on the storage electrode and having a second contact hole exposing the first contact hole, and a pixel electrode on the color filter and connected to the drain electrode; a common electrode panel facing the thin film transistor array panel, and including a common electrode, and a electrophoretic member between the pixel electrode and the common electrode.

Abstract: A method and an apparatus which adjusts a signal read from an optical disc in order to obtain stable binary data. The signal adjustment method comprises (a) detecting a period of an input signal of a predetermined code; (b) determining whether the detected period is smaller than a predetermined value; and (c) if the detected period is determined to be smaller than the predetermined value, adjusting the input signal so that its period equals the predetermined value, and outputting the input signal. The signal adjustment method and apparatus of the present invention reduce errors and improve system performance, when a signal input to the binary processor does not meet its code feature.

Abstract: The thin film transistor substrate includes a reflection area and a transmission area formed in a pixel region, a thin film transistor formed in the reflection area and connected to a gate line and a data line, an imprint layer formed in the reflection area and having an optical pattern surface, a reflective electrode formed on the imprint layer and having the same cross section as the optical pattern, a contact portion penetrating the imprint layer and the reflective electrode to expose a portion of a drain electrode of the thin film transistor, and a pixel electrode connected to the reflective electrode and connected to the drain electrode via the contact portion.

Abstract: Disclosed is a display substrate including a pixel electrode and a thin film transistor formed thereon. The thin film transistor includes a gate electrode, a source electrode, and a drain electrode, and the pixel electrode is formed by extending the drain electrode thereby reducing the required number of process steps and photo masks.

Abstract: A display substrate includes an insulation substrate, a gate line formed on the insulation substrate, a data line formed on the insulation substrate and crossing the gate line, a switching element formed on the insulation substrate and electrically connected to the gate line and the data line, and a pixel electrode formed on the insulation substrate. The pixel electrode is electrically connected to the switching element and includes a reflective electrode layer which reflects light and an absorption electrode layer which absorbs light.

Abstract: An imprinting apparatus and a method of the same which form a residual film including a uniform thickness all over a substrate. The imprinting apparatus includes a substrate support which supports a substrate which is coated with an imprint resin on an upper surface thereof, an imprint mold arranged on an upper side of the substrate support and which forms a predetermined pattern by molding the imprint resin coated on the substrate, a pressure roller which pressurizes the imprint mold to adhere closely to the substrate, a pressure roller control unit which controls the pressure roller to change a moving velocity and an applied pressure of the pressure roller according to a position of the imprint mold, and a resin curing unit which cures the imprint resin on the substrate.

Abstract: A clock generator for reproducing data recorded onto an optical disk, and more particularly, an apparatus for stably generating a clock signal synchronized with an input signal and a method of generating a clock signal. The apparatus generating a clock signal includes a voltage controlled oscillator, a phase compensator, a frequency compensator, and an adder. The voltage controlled oscillator generates a clock signal of a frequency that varies with a control voltage signal. The phase compensator receives an input signal and the clock signal, detects a phase difference between the input signal and the clock signal, and generates a first control voltage corresponding to the phase difference. The frequency compensator receives the input signal and the clock signal, detects a frequency difference between the input signal and the clock signal, and generates a second control voltage corresponding to the frequency difference.

Abstract: A method and an apparatus which adjusts a signal read from an optical disc in order to obtain stable binary data. The signal adjustment method comprises (a) detecting a period of an input signal of a predetermined code; (b) determining whether the detected period is smaller than a predetermined value; and (c) if the detected period is determined to be smaller than the predetermined value, adjusting the input signal so that its period equals the predetermined value, and outputting the input signal. The signal adjustment method and apparatus of the present invention reduce errors and improve system performance, when a signal input to the binary processor does not meet its code feature.

Abstract: A clock generator for reproducing data recorded onto an optical disk, and more particularly, an apparatus for stably generating a clock signal synchronized with an input signal and a method of generating a clock signal. The apparatus generating a clock signal includes a voltage controlled oscillator, a phase compensator, a frequency compensator, and an adder. The voltage controlled oscillator generates a clock signal of a frequency that varies with a control voltage signal. The phase compensator receives an input signal and the clock signal, detects a phase difference between the input signal and the clock signal, and generates a first control voltage corresponding to the phase difference. The frequency compensator receives the input signal and the clock signal, detects a frequency difference between the input signal and the clock signal, and generates a second control voltage corresponding to the frequency difference.