Patents by Inventor Ju Hu

Ju Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250225780
    Abstract: Methods, systems, and non-transitory computer-readable mediums for tuning a generative text-to-image neural network. Text prompts are processed using a pre-trained text encoder to obtain embedded text prompts, which are used by a pre-trained diffusion model to generate images. Reward scores are iteratively determined for the images while the pre-trained diffusion model is fixed and weights of the pre-trained text encoder are updated to fine tune the neural network in order to improve the quality of generated images. Additionally, reward scores for the images can then be determined with the updated weights of the text encoder fixed to update weights of the pre-trained diffusion model to further fine tune the neural network.
    Type: Application
    Filed: January 8, 2024
    Publication date: July 10, 2025
    Inventors: Erli Ding, Ju Hu, Yerlan Idelbayev, Anil Kag, Yanyu Li, Jian Ren, Dhritiman Sagar, Sergey Tulyakov
  • Patent number: 12236668
    Abstract: A vision transformer network having extremely low latency and usable on mobile devices, such as smart eyewear devices and other augmented reality (AR) and virtual reality (VR) devices. The transformer network processes an input image, and the network includes a convolution stem configured to patch embed the image. A first stack of stages including at least two stages of 4-Dimension (4D) metablocks (MBs) (MB4D) follow the convolution stem. A second stack of stages including at least two stages of 3-Dimension MBs (MB3D) follow the MB4D stages. Each of the MB4D stages and each of the MB3D stages include different layer configurations, and each of the MB4D stages and each of the MB3D stages include a token mixer. The MB3D stages each additionally include a multi-head self attention (MHSA) processing block.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: February 25, 2025
    Assignee: Snap Inc.
    Inventors: Jian Ren, Yang Wen, Ju Hu, Georgios Evangelidis, Sergey Tulyakov, Yanyu Li, Geng Yuan
  • Publication number: 20240394933
    Abstract: Described is a system for improving machine learning models by accessing a first latent diffusion machine learning model, accessing a second latent diffusion machine learning model that was derived from the first latent diffusion machine learning model, the second latent diffusion machine learning model trained to perform a second number of denoising steps, generating noise data, processing the noise data via the first latent diffusion machine learning model to generate one or more first latent features, processing the noise data via the second latent diffusion machine learning model to generate one or more second latent features, and inputting the one or more first latent features and the one or more second latent features into a loss function. The system then modifies a parameter of the second latent diffusion machine learning model based on the output of the loss function.
    Type: Application
    Filed: March 5, 2024
    Publication date: November 28, 2024
    Inventors: Pavlo Chemerys, Colin Eles, Ju Hu, Qing Jin, Yanyu Li, Ergeta Muca, Jian Ren, Dhritiman Sagar, Aleksei Stoliar, Sergey Tulyakov, Huan Wang
  • Publication number: 20240394843
    Abstract: Described is a system for improving machine learning models by accessing a first latent diffusion machine learning model, the first latent diffusion machine learning model trained to perform a first number of denoising steps, accessing a second latent diffusion machine learning model that was derived from the first latent diffusion machine learning model, the second latent diffusion machine learning model trained to perform a second number of denoising steps, generating noise data, processing the noise data via the first latent diffusion machine learning model to generate one or more first images, processing the noise data via the second latent diffusion machine learning model to generate one or more second images, and modify a parameter of the second latent diffusion machine learning model based on a comparison of the one or more first images with the one or more second images.
    Type: Application
    Filed: February 6, 2024
    Publication date: November 28, 2024
    Inventors: Pavlo Chemerys, Colin Eles, Ju Hu, Qing Jin, Yanyu Li, Ergeta Muca, Jian Ren, Dhritiman Sagar, Aleksei Stoliar, Sergey Tulyakov, Huan Wang
  • Publication number: 20240395028
    Abstract: Described is a system for improving machine learning models. In some cases, the system improves such models by identifying an autoencoder for a latent diffusion machine learning model, the latent diffusion machine learning model is trained to receive text as input and output an image based on the received text. The system identifies a number of channels in a decoder of the autoencoder, the decoder being configured to receive latent features as input and output images. The system further identifies a performance characteristic of the decoder and changes the node topology of the decoder based on the performance characteristic to generate an updated decoder. The system retrains the latent diffusion machine learning model using the updated decoder by inputting latent features to the updated decoder, receiving an outputted image from the updated decoder, and updating one or more weights of the decoder based on an assessment of the outputted image.
    Type: Application
    Filed: December 29, 2023
    Publication date: November 28, 2024
    Inventors: Pavlo Chemerys, Colin Eles, Ju Hu, Qing Jin, Yanyu Li, Ergeta Muca, Jian Ren, Dhritiman Sagar, Aleksei Stoliar, Sergey Tulyakov, Huan Wang
  • Publication number: 20240394932
    Abstract: Described is a system for improving machine learning models. In some cases, the system improves such models by identifying a performance characteristic for machine learning model blocks in an iterative denoising process of a machine learning model, connecting a prior machine learning model block with a subsequent machine learning model block of the machine learning model blocks within the machine learning model based on the identified performance characteristic, identifying a prompt of a user, the prompt indicative of an intent of the user for generative images, and analyzing data corresponding to the prompt using the machine learning model to generate one or more images, the machine learning model trained to generate images based on data corresponding to prompts.
    Type: Application
    Filed: December 29, 2023
    Publication date: November 28, 2024
    Inventors: Pavlo Chemerys, Colin Eles, Ju Hu, Qing Jin, Yanyu Li, Ergeta Muca, Jian Ren, Dhgritiman Sagar, Aleksei Stoliar, Sergey Tulyakov, Huan Wang
  • Publication number: 20240202869
    Abstract: A neural light field (NeLF) that runs real-time on mobile devices for neural rendering of three dimensional (3D) scenes, referred to as MobileR2L. The MobileR2L architecture runs efficiently on mobile devices with low latency and small size, and it achieves high-resolution generation while maintaining real-time inference for both synthetic and real-world 3D scenes on mobile devices. The MobileR2L has a network backbone including a convolutional layer embedding an input image at a resolution, residual blocks uploading the embedded image, and super-resolution modules receiving the uploaded embedded image and rendering an output image having a higher resolution than the embedded image. The convolution layer generates a number of rays equal to a number of pixels in the input image, where a partial number of the rays is uploaded to the super-resolution modules.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Inventors: Jian Ren, Pavlo Chemerys, Vladislav Shakhrai, Ju Hu, Denys Makoviichuk, Sergey Tulyakov, Junli Cao
  • Publication number: 20240203114
    Abstract: A mobile vision transformer network for use on mobile devices, such as smart eyewear devices and other augmented reality (AR) and virtual reality (VR) devices. The mobile vision transformer network considers factors including number of parameters, latency, and model performance, as they reflect disk storage, mobile frames per second (FPS), and application quality, respectively. The mobile vision transformer network processes images, e.g., for image classification, segmentation, and detection. The mobile vision transformer network has a fine-grained architecture including a search algorithm performing latency-driven slimming that jointly improves model size and speed.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Inventors: Jian Ren, Yanyu Li, Ju Hu, Yang Wen, Georgios Evangelidis, Sergey Tulyakov, Kamyar Salahi
  • Publication number: 20240020948
    Abstract: A vision transformer network having extremely low latency and usable on mobile devices, such as smart eyewear devices and other augmented reality (AR) and virtual reality (VR) devices. The transformer network processes an input image, and the network includes a convolution stem configured to patch embed the image. A first stack of stages including at least two stages of 4-Dimension (4D) metablocks (MBs) (MB4D) follow the convolution stem. A second stack of stages including at least two stages of 3-Dimension MBs (MB3D) follow the MB4D stages. Each of the MB4D stages and each of the MB3D stages include different layer configurations, and each of the MB4D stages and each of the MB3D stages include a token mixer. The MB3D stages each additionally include a multi-head self attention (MHSA) processing block.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventors: Jian Ren, Yang Wen, Ju Hu, Georgios Evangelidis, Sergey Tulyakov, Yanyu Li, Geng Yuan
  • Patent number: 10908448
    Abstract: A display apparatus includes a panel, a backlight module, a cover, an integrated plastic frame and an optical adhesive. The panel is disposed over the backlight module. The cover is disposed over the panel, which is located between the cover and the backlight module. The integrated plastic frame includes a first accommodating portion, a second accommodating portion and an adhesive-restricting portion. The second accommodating portion is coupled between the first accommodating portion and the adhesive-restricting portion. The combination of the first accommodating portion, the second accommodating portion and the adhesive-restricting portion is integrally formed. The first accommodating portion accommodates at least a portion of the backlight module, the second accommodating portion accommodates the panel, and the adhesive-restricting portion is coupled between the second accommodating portion and the cover to define an accommodating space together with the cover and the panel.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: February 2, 2021
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chin-Yang Wu, Tsung-Chen Chou, Tsung-Ju Hu, Yau-Yang Jung, Wen-Hsiao Huang
  • Patent number: 10845841
    Abstract: A display apparatus includes a display module, a cover, a connecting element and an optical adhesive. The cover is disposed over the display module, and includes a cover portion and an adhesive-restricting portion. The adhesive-restricting portion is protruded from a periphery of a bottom side of the cover portion. The adhesive-restricting portion includes a lower surface facing a surface of the display module. The connecting element is connected between the lower surface of the adhesive-restricting portion and the surface of the display module, and defines an accommodating space together with the cover and the display module. The optical adhesive is disposed in the accommodating space.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: November 24, 2020
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chin-Yang Wu, Tsung-Chen Chou, Tsung-Ju Hu, Wen-Hsiao Huang, Yau-Yang Jung
  • Patent number: 10114343
    Abstract: The present disclosure provides a touch device. The touch device includes a touch panel and an external circuit. The touch panel is configured to detect touch operations. The external circuit is configured to drive the touch panel. A plurality of connection structures extend from edges of the touch panel towards the external circuit. The plurality of connection structures are electrically conductive and are electrically coupled to the external circuit. The connection structures are configured to transmit touch signals from the touch panel to the external circuit.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: October 30, 2018
    Assignees: INTERFACE OPTOELECTRONIC (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chi-Hsien Huang, Chen-Hsing Huang, Yi-Fan Chang, Tsung-Ju Hu
  • Publication number: 20170010726
    Abstract: The present disclosure provides a touch device. The touch device includes a touch panel and an external circuit. The touch panel is configured to detect touch operations. The external circuit is configured to drive the touch panel. A plurality of connection structures extend from edges of the touch panel towards the external circuit. The plurality of connection structures are electrically conductive and are electrically coupled to the external circuit. The connection structures are configured to transmit touch signals from the touch panel to the external circuit.
    Type: Application
    Filed: June 28, 2016
    Publication date: January 12, 2017
    Inventors: CHI-HSIEN HUANG, CHEN-HSING HUANG, YI-FAN CHANG, TSUNG-JU HU
  • Patent number: 8476728
    Abstract: A parasitic PIN device in a BiCMOS process is disclosed. The device is formed on a silicon substrate, in which an active region is isolated by shallow trenches. The device includes: an N-type region, consisting of N-type pseudo buried layers respectively formed at the bottom of shallow trench isolation oxide layers and extending into the active region; an I-type region, consisting of an N-type collector implantation region formed in the active region and contacting with the N-type region; a P-type region, consisting of a P-doped intrinsic base epitaxial layer on a surface of the active region and contacting with the I-type region. The device of the present invention has a low insertion loss and a high isolation. A manufacturing method of parasitic PIN device in compatible with existing BiCMOS process is also disclosed.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: July 2, 2013
    Assignee: Shanghai Hua Hong NEC Electronics Co., Ltd.
    Inventors: Wensheng Qian, Ju Hu
  • Publication number: 20120049319
    Abstract: A parasitic PIN device in a BiCMOS process is disclosed. The device is formed on a silicon substrate, in which an active region is isolated by shallow trenches. The device includes: an N-type region, consisting of N-type pseudo buried layers respectively formed at the bottom of shallow trench isolation oxide layers and extending into the active region; an I-type region, consisting of an N-type collector implantation region formed in the active region and contacting with the N-type region; a P-type region, consisting of a P-doped intrinsic base epitaxial layer on a surface of the active region and contacting with the I-type region. The device of the present invention has a low insertion loss and a high isolation. A manufacturing method of parasitic PIN device in compatible with existing BiCMOS process is also disclosed.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 1, 2012
    Inventors: Wensheng Qian, Ju Hu
  • Patent number: 7176639
    Abstract: An improved electronic ballast for providing an electrical energy to a fluorescent lamp circuit is provided. It includes a pre-heating inductor; a first resonant circuit connected to the pre-heating inductor in parallel and coupled to the fluorescent lamp circuit for pre-heating the fluorescent lamp circuit according to a first resonant frequency; a second resonant circuit coupled to the fluorescent lamp circuit for igniting the fluorescent lamp circuit according to a second resonant frequency; and a driving circuit coupled to the second resonant circuit for continuously providing the electrical energy to the first resonant circuit and the second resonant circuit respectively according to the first resonant frequency and the second resonant frequency.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: February 13, 2007
    Assignee: Delta Electronics, Inc.
    Inventors: Xiao-Ju Hu, Chen-Yang Liu, Jian-Ping Ying
  • Publication number: 20050179403
    Abstract: An improved electronic ballast for providing an electrical energy to a fluorescent lamp circuit is provided. It includes a pre-heating inductor; a first resonant circuit connected to the pre-heating inductor in parallel and coupled to the fluorescent lamp circuit for pre-heating the fluorescent lamp circuit according to a first resonant frequency; a second resonant circuit coupled to the fluorescent lamp circuit for igniting the fluorescent lamp circuit according to a second resonant frequency; and a driving circuit coupled to the second resonant circuit for continuously providing the electrical energy to the first resonant circuit and the second resonant circuit respectively according to the first resonant frequency and the second resonant frequency.
    Type: Application
    Filed: June 8, 2004
    Publication date: August 18, 2005
    Inventors: Xiao-Ju Hu, Chen-Yang Liu, Jian-Ping Ying