Abstract: Disclosed is an all-solid-state battery having uniform interfaces between electrodes and a solid electrolyte layer.

Abstract: A method for manufacturing a pouch-type secondary battery according to an embodiment of the present invention may include: a first sealing operation of fusing a lead film, which is attached to an electrode lead of an electrode assembly, to a sealing portion of a pouch in which the electrode assembly is accommodated; and a second sealing operation of sealing the sealing portion of the pouch. The first sealing operation may include: a heating process of irradiating with a laser beam a region which is present in the sealing portion of the pouch and corresponds to the lead film, thereby heating the lead film and melting a resin layer of the region; and a bonding process of compressing the region, thereby bonding the lead film and the melted resin layer.

Abstract: In the present disclosure, a heterogeneous nickel-based oligomerization catalyst in which nickel in the form of single atom is loaded on an Al-mesoporous silicate support by ion exchange and a method for producing the same, and a method for oligomerizing light olefins, specifically C4 olefins using the catalyst are described.

Abstract: A power semiconductor device includes a semiconductor layer formed of silicon carbide (SiC), a trench formed by etching the semiconductor layer, a gate formed in a manner that a partial region of the gate is buried in the trench and another partial region of the gate extends over the semiconductor layer, a shield region formed to surround a lower region of the trench, a well region disposed in the semiconductor layer to be in contact with a first side surface of the trench and an upper surface of the semiconductor layer, a source region disposed in the well region, and a shield connector formed to extend from an upper surface of the semiconductor layer to the shield region while contacting a second side surface opposite to the first side surface.

Abstract: A power semiconductor device includes a semiconductor layer of silicon carbide (SiC), at least one trench that extends in one direction, a gate insulating layer disposed on at least an inner wall of the at least one trench, at least one gate electrode layer disposed on the gate insulating layer, a drift region disposed in the semiconductor layer at least on one side of the at least one gate electrode layer, a well region disposed in the semiconductor layer to be deeper than the at least one gate electrode layer, a source region disposed in the well region, and at least one channel region disposed in the semiconductor layer of one side of the at least one gate electrode layer between the drift region and the source region.

Abstract: An aerosol-generating article according to one aspect of the present disclosure may include a tobacco medium portion, a filter portion disposed to be spaced apart from the tobacco medium portion, a wrapper surrounding the tobacco medium portion and the filter portion, and a cooling portion surrounded by the tobacco medium portion, the filter portion, and the wrapper so as to have a space therein.

Abstract: An aerosol-generating article according to one aspect of the present disclosure may include a tobacco medium portion and a filter portion coupled to a side of the tobacco medium portion and cooling and filtering an aerosol delivered from the tobacco medium portion. The filter portion may include a first filter segment disposed to be spaced apart from the tobacco medium portion and filtering the aerosol, an inner wrapper surrounding the first filter segment and extending toward the tobacco medium portion, and a second filter segment surrounded by the tobacco medium portion, the first filter segment, and the inner wrapper so as to have a space therein.

Abstract: A substrate processing apparatus includes a first supply pipe supplying a first chemical liquid to a substrate, a second supply pipe, spaced apart from the first supply pipe, and supplying a second chemical liquid to the substrate, and a recovery pipe connected to the first supply pipe to collect the first chemical liquid, and disposed between the first supply pipe and the second supply pipe.

Abstract: A power semiconductor device includes a semiconductor layer formed of silicon carbide (SiC), a trench formed by etching the semiconductor layer, a gate formed in a manner that a partial region of the gate is buried in the trench and another partial region of the gate extends over the semiconductor layer, a shield region formed to surround a lower region of the trench, a well region disposed in the semiconductor layer to be in contact with a first side surface of the trench and an upper surface of the semiconductor layer, a source region disposed in the well region, and a shield connector formed to extend from an upper surface of the semiconductor layer to the shield region while contacting a second side surface opposite to the first side surface.

Abstract: A power semiconductor device includes a semiconductor layer of silicon carbide (SiC), at least one trench that extends in one direction, a gate insulating layer disposed on at least an inner wall of the at least one trench, at least one gate electrode layer disposed on the gate insulating layer, a drift region disposed in the semiconductor layer at least on one side of the at least one gate electrode layer, a well region disposed in the semiconductor layer to be deeper than the at least one gate electrode layer, a source region disposed in the well region, and at least one channel region disposed in the semiconductor layer of one side of the at least one gate electrode layer between the drift region and the source region.

Abstract: Proposed are a substrate processing apparatus having improved substrate drying performance by separately providing a chemical liquid supply nozzle and a gas supply nozzle; and a substrate processing method.

Abstract: Disclosed is a power semiconductor device that includes a gate electrode recessed from a first surface of a semiconductor substrate to a second surface, disposed opposite to the first surface, of the semiconductor substrate, an emitter region, including impurities in a first conductive type, disposed in contact with a trench, in which the gate electrode is disposed, and the first surface, a collector region, including impurities in a second conductive type opposite to the first conductive type, disposed in contact with the second surface, a floating region, including the impurities in the second conductive type, extending toward the second surface in an extension direction of the trench while surrounding a bottom surface of the trench, and a trench emitter region interposed under the gate electrode in the trench.

Abstract: A power semiconductor device includes a plurality of gate electrodes configured to be recessed from a first surface of a semiconductor substrate to a second surface of the semiconductor substrate, the second surface being opposite to the first surface, an emitter region configured to make contact with a trench and the first surface, being provided between respective ones of the plurality of gate electrodes, and including impurities of a first conductive type, a collector region configured to make contact with the second surface, and including second impurities of a second conductive type opposite to the first conductive type, a floating region extending toward the second surface in an extension direction of the trench while surrounding a bottom surface of the trench, and including the second impurities, and a trench emitter region interposed between the plurality of gate electrodes in the trench.

Abstract: According to various embodiments, an image analysis server for determining whether an image is suitable for skin analysis may include a DB management unit for obtaining a captured image from a skin measurement device and storing the captured image; a user detector for detecting a user's face based on the obtained image; an image suitability determination unit for determining whether the obtained image is suitable for skin analysis; a skin analyzer for analyzing skin corresponding to the detected user's face based on the image determined to be suitable for skin analysis; and a service providing unit for calculating a skin score according to the analysis and providing the calculated skin score to a user terminal.

Abstract: A power semiconductor device includes a semiconductor layer, a ladder-shaped trench recessed a specific depth from a surface of the semiconductor layer into the semiconductor layer and including a pair of lines having a first depth and a plurality of connectors connected between the pair of lines and having a second depth shallower than the first depth, a well region defined in the semiconductor layer between the pair of lines and between the plurality of connectors of the trench, a floating region defined in the semiconductor layer outside the pair of lines of the trench, a gate insulating layer disposed on an inner wall of the trench, and a gate electrode layer disposed on the gate insulating layer to fill the trench and including a first portion in which the pair of lines is filled and a second portion in which the plurality of connectors is filled. A depth of the second portion of the gate electrode layer is shallower than a depth of the first portion of the gate electrode layer.

Abstract: An aerosol delivering device includes a case that is configured to accommodate an aerosol generating source and includes a discharge hole that is configured to discharge an aerosol generated by the aerosol generating source; a rotation body that is configured to rotate with respect to the case and includes a plurality of chambers sequentially arranged in a rotation direction, each of the plurality of chambers accommodating a medium and configured to pass the aerosol therethrough; and a position limiter that is configured to maintain a rotational position of the rotation body with respect to the case so that a position of at least one of the plurality of chambers corresponds to a position of the discharge hole.

Abstract: The inventive concept provides a liquid treating apparatus.

Abstract: A power semiconductor device includes a semiconductor layer, first trenches recessed into the semiconductor layer from a surface of the semiconductor layer, a drift region, having a first conductivity type, disposed in the semiconductor layer to extend from a lower side the first trenches to between the first trenches such that a vertical charge transport path is provided, a well region disposed in the semiconductor layer on the drift region between the first trenches and having a second conductivity type, an emitter region disposed on the well region and having the first conductivity type, a floating electrode layer disposed in each of the first trenches, a second trench extending through the well region to be in contact with the drift region, and a gate electrode layer disposed in the second trench.

Abstract: A power semiconductor device includes: a semiconductor layer including a main cell region, a sensor region, and an insulation region between the main cell region and the sensor region; a plurality of power semiconductor transistors disposed on the main cell region; a plurality of current sensor transistors disposed on the sensor region; and a protection resistance layer disposed on the semiconductor layer across the insulation region so that at least a portion of the plurality of power semiconductor transistors and at least a portion of the plurality of current sensor transistors are connected to each other under an abnormal operation condition.

Abstract: A power semiconductor device includes a semiconductor layer, a ladder-shaped trench recessed a specific depth from a surface of the semiconductor layer into the semiconductor layer and including a pair of lines having a first depth and a plurality of connectors connected between the pair of lines and having a second depth shallower than the first depth, a well region defined in the semiconductor layer between the pair of lines and between the plurality of connectors of the trench, a floating region defined in the semiconductor layer outside the pair of lines of the trench, a gate insulating layer disposed on an inner wall of the trench, and a gate electrode layer disposed on the gate insulating layer to fill the trench and including a first portion in which the pair of lines is filled and a second portion in which the plurality of connectors is filled. A depth of the second portion of the gate electrode layer is shallower than a depth of the first portion of the gate electrode layer.