Abstract: The present invention relates to technology capable of labeling a certain site of an antibody with a certain number of chemical functional groups or cargo moieties. The present invention may provide an antibody product having high uniformity. The present invention may provide an antibody product whose antibody functions are not degraded. That is, the present invention may provide an antibody product whose antibody binding affinity and half-life are not degraded. The present invention is of great significance as being the first technology allowing site-specific labeling of an antibody without any complicated processes.

Abstract: According to various embodiments, an image analysis server for determining whether an image is suitable for skin analysis may include a DB management unit for obtaining a captured image from a skin measurement device and storing the captured image; a user detector for detecting a user's face based on the obtained image; an image suitability determination unit for determining whether the obtained image is suitable for skin analysis; a skin analyzer for analyzing skin corresponding to the detected user's face based on the image determined to be suitable for skin analysis; and a service providing unit for calculating a skin score according to the analysis and providing the calculated skin score to a user terminal.

Abstract: A power semiconductor device includes a semiconductor layer, a ladder-shaped trench recessed a specific depth from a surface of the semiconductor layer into the semiconductor layer and including a pair of lines having a first depth and a plurality of connectors connected between the pair of lines and having a second depth shallower than the first depth, a well region defined in the semiconductor layer between the pair of lines and between the plurality of connectors of the trench, a floating region defined in the semiconductor layer outside the pair of lines of the trench, a gate insulating layer disposed on an inner wall of the trench, and a gate electrode layer disposed on the gate insulating layer to fill the trench and including a first portion in which the pair of lines is filled and a second portion in which the plurality of connectors is filled. A depth of the second portion of the gate electrode layer is shallower than a depth of the first portion of the gate electrode layer.

Abstract: An aerosol delivering device includes a case that is configured to accommodate an aerosol generating source and includes a discharge hole that is configured to discharge an aerosol generated by the aerosol generating source; a rotation body that is configured to rotate with respect to the case and includes a plurality of chambers sequentially arranged in a rotation direction, each of the plurality of chambers accommodating a medium and configured to pass the aerosol therethrough; and a position limiter that is configured to maintain a rotational position of the rotation body with respect to the case so that a position of at least one of the plurality of chambers corresponds to a position of the discharge hole.

Abstract: The inventive concept provides a liquid treating apparatus.

Abstract: A power semiconductor device includes a semiconductor layer, first trenches recessed into the semiconductor layer from a surface of the semiconductor layer, a drift region, having a first conductivity type, disposed in the semiconductor layer to extend from a lower side the first trenches to between the first trenches such that a vertical charge transport path is provided, a well region disposed in the semiconductor layer on the drift region between the first trenches and having a second conductivity type, an emitter region disposed on the well region and having the first conductivity type, a floating electrode layer disposed in each of the first trenches, a second trench extending through the well region to be in contact with the drift region, and a gate electrode layer disposed in the second trench.

Abstract: A power semiconductor device includes: a semiconductor layer including a main cell region, a sensor region, and an insulation region between the main cell region and the sensor region; a plurality of power semiconductor transistors disposed on the main cell region; a plurality of current sensor transistors disposed on the sensor region; and a protection resistance layer disposed on the semiconductor layer across the insulation region so that at least a portion of the plurality of power semiconductor transistors and at least a portion of the plurality of current sensor transistors are connected to each other under an abnormal operation condition.

Abstract: A power semiconductor device includes a semiconductor layer, a ladder-shaped trench recessed a specific depth from a surface of the semiconductor layer into the semiconductor layer and including a pair of lines having a first depth and a plurality of connectors connected between the pair of lines and having a second depth shallower than the first depth, a well region defined in the semiconductor layer between the pair of lines and between the plurality of connectors of the trench, a floating region defined in the semiconductor layer outside the pair of lines of the trench, a gate insulating layer disposed on an inner wall of the trench, and a gate electrode layer disposed on the gate insulating layer to fill the trench and including a first portion in which the pair of lines is filled and a second portion in which the plurality of connectors is filled. A depth of the second portion of the gate electrode layer is shallower than a depth of the first portion of the gate electrode layer.

Abstract: Provided is a semiconductor device. The device comprises an epitaxial layer that constitutes a part of an active cell region and is doped with impurities of a first conductivity type at a first concentration; a field stop region that is located below the epitaxial layer and doped with impurities of a second conductivity type at a second concentration which are then activated; and a collector region that is located below the field stop region 70 and is doped with impurities of a second conductivity type. The field stop region is formed by repeatedly alternately arranging regions in which the activation of the impurities of the first conductivity type is relatively strong and regions in which the activation of the impurities of the first conductivity type is relatively weak.

Abstract: The power semiconductor device includes: a first trench gate and a second trench gate in a stripe shape extending in one direction in parallel and spaced apart from each other in a substrate; a third trench gate in a ladder shape extending in a direction different from the one direction between the first trench gate and the second trench gate in the substrate; a first conductive type body area each disposed between the first trench gate, the second trench gate and the third trench gate, respectively, in the substrate; a pair of first conductive type floating first areas surrounding each of bottom surfaces and at least one side of the first trench gate and the second trench gate in the substrate; and a first conductive type floating second area surrounding a bottom surface of the third trench gate in the substrate.

Abstract: A power semiconductor device includes: a semiconductor layer including a main cell region, a sensor region, and an insulation region between the main cell region and the sensor region; a plurality of power semiconductor transistors disposed on the main cell region; a plurality of current sensor transistors disposed on the sensor region; and a protection resistance layer disposed on the semiconductor layer across the insulation region so that at least a portion of the plurality of power semiconductor transistors and at least a portion of the plurality of current sensor transistors are connected to each other under an abnormal operation condition.

Abstract: The power semiconductor device includes: a first trench gate and a second trench gate in a stripe shape extending in one direction in parallel and spaced apart from each other in a substrate; a third trench gate in a ladder shape extending in a direction different from the one direction between the first trench gate and the second trench gate in the substrate; a first conductive type body area each disposed between the first trench gate, the second trench gate and the third trench gate, respectively, in the substrate; a pair of first conductive type floating first areas surrounding each of bottom surfaces and at least one side of the first trench gate and the second trench gate in the substrate; and a first conductive type floating second area surrounding a bottom surface of the third trench gate in the substrate.

Abstract: Provided are a method for controlling a beamforming antenna to enhance transmitting/receiving performance and a wireless communication device performing the same in a TDMA-based wireless communication system. The wireless communication device includes a beamforming antenna, which is configured with omnidirectional antennas, including a central antenna and a plurality of parasitic antennas and a controller controlling a beamforming direction of the beamforming antenna by analyzing a signal received from other station. The method for controlling a beamforming antenna includes analyzing, by a wireless communication device having a beamforming antenna, which is configured with omnidirectional antennas, including a central antenna and a plurality of parasitic antennas, a signal received from other station to control a beamforming direction of the beamforming antenna.

Abstract: Provided are a transmission/reception slot management apparatus and method for maritime communication and a VHF data exchange system for a ship. The transmission/reception slot management method performed by a transmission/reception slot management apparatus of a VHF data exchange system (VDES) for a ship, the transmission/reception slot management method includes allocating, to a slot map for transmitting and receiving data through a single antenna for transmission/reception, a reception slot according to slot reservation information received from another ship station or a base station (BS), sorting transmission data to be transmitted to the other ship station or the BS according to a predetermined priority, and sequentially allocating, to the slot map, the sorted transmission data according to the predetermined priority.

Abstract: Provided is a semiconductor device. The device comprises an epitaxial layer that constitutes a part of an active cell region and is doped with impurities of a first conductivity type at a first concentration; a field stop region that is located below the epitaxial layer and doped with impurities of a second conductivity type at a second concentration which are then activated; and a collector region that is located below the field stop region 70 and is doped with impurities of a second conductivity type. The field stop region is formed by repeatedly alternately arranging regions in which the activation of the impurities of the first conductivity type is relatively strong and regions in which the activation of the impurities of the first conductivity type is relatively weak.

Abstract: The present invention provides a semiconductor device comprising a substrate including an active region and an edge region and containing a semiconductor doped with impurities having a first conductivity type; an insulating film disposed on the edge region of the substrate; a field plate pattern disposed on the insulating film; and at least one first doped region having a second conductivity type buried in the edge region of the substrate and extending in a direction having a vector component parallel to an upper surface of the substrate.

Abstract: Provided is a power semiconductor device comprising a gate electrode in a trench of a substrate; a body region having a first conductivity type on one side of the gate electrode; a source region having a second conductivity type adjacent to the gate electrode; a floating region having a first conductivity type on the other side of the gate electrode; an edge doped region having a first conductivity type spaced apart from the floating region and electrically connected to the source region; an edge junction isolation region having a second conductivity type between the floating region and the edge doped region; and a drift region having a second conductivity type below the floating, edge doped, and edge junction isolation regions, wherein the doping concentration of a second conductivity type in the edge junction isolation region is higher than the doping concentration of a second conductivity type in the drift region.

Abstract: Provided are a method for controlling a beamforming antenna to enhance transmitting/receiving performance and a wireless communication device performing the same in a TDMA-based wireless communication system. The wireless communication device includes a beamforming antenna, which is configured with omnidirectional antennas, including a central antenna and a plurality of parasitic antennas and a controller controlling a beamforming direction of the beamforming antenna by analyzing a signal received from other station. The method for controlling a beamforming antenna includes analyzing, by a wireless communication device having a beamforming antenna, which is configured with omnidirectional antennas, including a central antenna and a plurality of parasitic antennas, a signal received from other station to control a beamforming direction of the beamforming antenna.

Abstract: Provided is a power semiconductor device comprising a pair of gate electrodes respectively disposed in a first trench and a second trench spaced apart from each other in a substrate; a body region having a first conductivity type disposed between the first trench and the second trench; a pair of floating regions having a first conductivity type spaced apart from each other and surrounding a bottom surface and at least one side surface of the first trench and the second trench, respectively; and a drift region having a second conductivity type which extends from below the pair of floating regions through a region between the pair of floating regions to the body region, wherein, in the drift region, the doping concentration of a second conductivity type between the pair of floating regions is higher than the doping concentration of a second conductivity type below the pair of floating regions.

Abstract: Provided is a power semiconductor device comprising a pair of gate electrodes respectively disposed in a first trench and a second trench spaced apart from each other in a substrate; a body region having a first conductivity type disposed between the first trench and the second trench; a pair of floating regions having a first conductivity type spaced apart from each other and surrounding a bottom surface and at least one side surface of the first trench and the second trench, respectively; and a drift region having a second conductivity type which extends from below the pair of floating regions through a region between the pair of floating regions to the body region, wherein, in the drift region, the doping concentration of a second conductivity type between the pair of floating regions is higher than the doping concentration of a second conductivity type below the pair of floating regions.