Abstract: An antenna apparatus includes a patch antenna pattern; a first feed via to feed power to the patch antenna pattern in a non-contact manner on a first side of the patch antenna pattern; and a plurality of feed patterns disposed on the first side of the patch antenna pattern on different levels and overlapping each other, and including at least one feed pattern that is electrically connected to the first feed via, and each having a width greater than a width of the first feed via and a cross-sectional area smaller than a cross-sectional area of the patch antenna pattern.

Abstract: A chip antenna module includes a substrate, a plurality of chip antennas disposed on a first surface of the substrate, and an electronic element mounted on a second surface of the substrate, wherein each of the plurality of chip antennas includes a first ceramic substrate mounted on the first surface of the substrate, a second ceramic substrate opposing the first ceramic substrate, a first patch disposed on the first ceramic substrate, and a second patch disposed on the second ceramic substrate, and the first ceramic substrate and the second ceramic substrate are spaced apart from each other.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna apparatus includes a feed via, a patch antenna pattern which is electrically connected to a first end of the feed via, a plurality of first conductive array patterns, respectively disposed to be spaced apart from the patch antenna pattern and arranged to correspond to at least a portion of a side boundary of the patch antenna pattern, and a first conductive ring pattern spaced apart from the patch antenna pattern and the plurality of conductive array patterns and configured to surround the patch antenna pattern and the plurality of conductive array patterns.

Abstract: An antenna apparatus may include: first patch antenna patterns arrayed in an N×1 structure, the first patch antenna patterns each having a polygonal shape having an oblique side with respect to an array direction of the N×1 structure; feed vias electrically connected to the first patch antenna patterns; and guide vias arrayed along the oblique side, wherein N is a natural number greater than or equal to 2.

Abstract: A chip antenna module array includes a connection member and chip antenna modules mounted on the connection member. Each chip antenna module includes: a first patch antenna dielectric layer; a feed via extending through the first patch antenna dielectric layer; and a patch antenna pattern disposed on an upper surface of the first patch antenna dielectric layer and configured to be fed from the feed via. At least one chip antenna module includes: a ground pattern disposed on a lower surface of the first patch antenna dielectric layer; a chip-antenna feed line including a second part disposed on a lower surface of the ground pattern, and electrically connecting a connection member feed line to the feed via; a first feed line dielectric layer disposed on a lower surface of the second part; and a solder layer disposed on a lower surface of the first feed line dielectric layer.

Abstract: A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via.

Abstract: An antenna apparatus may include: a substrate; two feed vias disposed in the substrate; and an antenna pattern disposed on one surface of the substrate, and including a central portion and wing portions protruding from the central portion. A first wing portion and a second wing portion adjacent to the first wing portion, among the wing portions, may be disposed over the two feed vias. The antenna apparatus may be configured to selectively provide a feed signal to either one or both of the two feed vias.

Abstract: A chip antenna module includes: a first dielectric layer; a first feed via extending through the first dielectric layer; a second feed via extending through the first dielectric layer; a first patch antenna pattern disposed on an upper surface of the first dielectric layer, electrically connected to the first feed via, and having a through-hole through which the second feed via passes; a second patch antenna pattern disposed above the first patch antenna pattern and electrically connected to the second feed via; and a second dielectric layer and a third dielectric layer, respectively located vertically between the first patch antenna pattern and the second patch antenna pattern, and having different dielectric constants that form a first dielectric constant boundary surface between the first and second patch antenna patterns.

Abstract: A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna module includes: an IC package including an IC; first and second antenna portions including respective patch antenna patterns, respective feed vias connected to the respective patch antenna patterns, and respective dielectric layers surrounding the respective feed vias; and a connection member having an upper surface on which the first and second antenna portions are disposed and a lower surface on which the IC package is disposed, the connection member forming an electrical connection path between the IC and the feed via of the first antenna portion and an electrical connection path of the second antenna portion. The connection member includes a first region disposed between the IC package and the first antenna portion, a second region on which the second antenna portion is disposed, and a third region electrically connecting the first and second regions and being more flexible than the dielectric layer of the first antenna portion.

Abstract: An antenna apparatus includes: a feed via; a patch antenna pattern electrically connected to one end of the feed via; a ground layer disposed in a position vertically lower than a position of the patch antenna pattern, and having a through-hole through which the feed via passes; a first conductive ring pattern laterally spaced apart from the patch antenna pattern, and having a first through region laterally surrounding the patch antenna pattern; and a second conductive ring pattern disposed in a position vertically higher than a position of the first conductive ring pattern, and having a second through region laterally surrounding the patch antenna pattern, wherein an area of the second through region is greater than an area of the first through region.

Abstract: An antenna apparatus includes a ground layer, patch antenna patterns, feed vias, ring-type meta patterns, and coupling-type meta patterns. The ground layer has one or more through-holes. Patch antenna patterns are each disposed above the ground layer. Feed vias are disposed to penetrate through the one or more through-holes, and electrically connect to the patch antenna patterns, respectively. Ring-type meta patterns are arranged between the patch antenna patterns. Coupling-type meta patterns are alternately arranged between the patch antenna patterns in fewer numbers than the ring-type meta patterns in positions more distant from the patch antenna patterns than positions in which the ring-type meta patterns are arranged.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna apparatus includes a feed line; a ground plane surrounding a portion of the feed line; a feed via electrically connected to the feed line and extending from a first side of the feed line; a first end-fire antenna pattern disposed on a first side of at least a portion of the ground plane and spaced apart from the ground plane, and electrically connected to the feed via; a second end-fire antenna pattern disposed on a second side of the feed line opposite the first side of the feed line and spaced apart from the first end-fire antenna pattern; and a core via electrically connecting the first end-fire antenna patterns to the second end-fire antenna pattern.

Abstract: An antenna apparatus includes a patch antenna pattern; a first feed via to feed power to the patch antenna pattern in a non-contact manner on a first side of the patch antenna pattern; and a plurality of feed patterns disposed on the first side of the patch antenna pattern on different levels and overlapping each other, and including at least one feed pattern that is electrically connected to the first feed via, and each having a width greater than a width of the first feed via and a cross-sectional area smaller than a cross-sectional area of the patch antenna pattern.

Abstract: An antenna module includes: an IC package including an IC; first and second antenna portions including respective patch antenna patterns, respective feed vias connected to the respective patch antenna patterns, and respective dielectric layers surrounding the respective feed vias; and a connection member having an upper surface on which the first and second antenna portions are disposed and a lower surface on which the IC package is disposed, the connection member forming an electrical connection path between the IC and the feed via of the first antenna portion and an electrical connection path of the second antenna portion. The connection member includes a first region disposed between the IC package and the first antenna portion, a second region on which the second antenna portion is disposed, and a third region electrically connecting the first and second regions and being more flexible than the dielectric layer of the first antenna portion.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to face the first ceramic substrate, a first patch disposed on one surface of the first ceramic substrate to operate as a feeding patch, a second patch disposed on the second ceramic substrate to operate as a radiation patch, at least one feed via penetrating through the first ceramic substrate in a thickness direction to provide a feed signal to the first patch, and a bonding pad disposed on a second surface of the first ceramic substrate opposite the first surface. A thickness of the first ceramic substrate is greater than a thickness of the second ceramic substrate.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to oppose the first ceramic substrate, a first patch, disposed on the first ceramic substrate, configured to operate as a feed patch, a second patch, disposed on the second ceramic substrate, configured to operate as a radiation patch, an insertion member disposed between the first ceramic substrate and the second ceramic substrate, and a shielding layer disposed on a side surface of the insertion member.