Abstract: The present invention relates to a fluorescent reporter capable of labeling nucleic acids including DNA and exhibiting luminescent properties at an excited energy level, and various uses thereof.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes a housing having a treating space for treating a substrate; a support unit positioned at the treating space; and a plasma source for generating a plasma by exciting a gas supplied to the treating space, and wherein the support unit includes: a first plate at which the substrate is positioned at a top side; a second plate which is positioned at a bottom side of the first plate; and an adhesive layer for adhering the first plate and the second plate to each other, and wherein a top surface of the second plate is divided into a central region including a center of the top surface and an edge region surrounding the central region, and a height of the adhesive layer filled between a bottom surface of the first plate and the top surface of the second plate is substantially different at the central region and at the edge region.

Abstract: A random access method for a terminal with the processor and the memory to access a low earth orbit satellite network formed by multiple low earth orbit satellites (LEO SAT) includes: the stage where a Deep Reinforcement Learning (DRL) algorithm is applied for a pre-set time to decide which one between the first and the second actions should be performed at every access cycle, and to perform the random access to the low earth orbit satellite network based on the above decision while learning it; and the stage where, according to the learning result of the DRL algorithm performed for above pre-set time, it decides which of the first and the second actions should be chosen when attempting to access the low earth orbit satellite network at a new access cycle and then to perform the random access to the low earth orbit satellite network according to the above choice.

Abstract: Systems, devices, methods, and instructions for transmitting a signal by an electronic apparatus that include generating transmission data and pseudo-random data corresponding to the transmission data, setting a first pseudo time delay interval for the transmission data and a second pseudo time delay interval for the pseudo-random data, acquiring a data signal for transmitting the transmission data to correspond to the first pseudo time delay interval and a pseudo-random signal for transmitting the pseudo-random data to correspond to the second pseudo time delay interval, and transmitting an overlapping signal including the data signal and the pseudo-random signal.

Abstract: The present invention relates to an apparatus for cooling an LCD panel of a 3D printer that transmits the light irradiated from a light source module to the LCD panel and cures a photocurable resin in a water tank to produce a sculpture, the apparatus comprising: a sealed case arranged between the light source module and the LCD panel; and a cooling module installed on one side or lower surface of the sealed case and cooling the air inside the sealed case to cool the LCD panel.

Abstract: A photoresist supplying system includes a pump that includes a first tube phragm that stores a photoresist and a filter that filters the photoresist, a second tube phragm that stores the photoresist and is disposed outside the pump, where the second tube phragm transfers the photoresist to the first tube phragm, a storage unit that stores the photoresist, where the storage unit provides the photoresist to the second tube phragm, and a tube phragm drive unit that is connected to the first tube phragm. The tube phragm drive unit adjusts an interior volume of the first tube phragm and applies a pressure to a flexible outer wall of the first tube phragm to transfer the photoresist from the first tube phragm to a nozzle installed in the chamber. At least a part of the photoresist stored in the first tube phragm is transferred to the second tube phragm.

Abstract: A random access method for a terminal with the processor and the memory to access a low earth orbit satellite network formed by multiple low earth orbit satellites (LE0 SAT) includes: the stage where a Deep Reinforcement Learning (DRL) algorithm is applied for a pre-set time to decide which one between the first and the second actions should be performed at every access cycle, and to perform the random access to the low earth orbit satellite network based on the above decision while learning it; and the stage where, according to the learning result of the DRL algorithm performed for above pre-set time, it decides which of the first and the second actions should be chosen when attempting to access the low earth orbit satellite network at a new access cycle and then to perform the random access to the low earth orbit satellite network according to the above choice.

Abstract: A photoresist supplying system includes a pump that includes a first tube phragm that stores a photoresist and a filter that filters the photoresist, a second tube phragm that stores the photoresist and is disposed outside the pump, where the second tube phragm transfers the photoresist to the first tube phragm, a storage unit that stores the photoresist, where the storage unit provides the photoresist to the second tube phragm, and a tube phragm drive unit that is connected to the first tube phragm. The tube phragm drive unit adjusts an interior volume of the first tube phragm and applies a pressure to a flexible outer wall of the first tube phragm to transfer the photoresist from the first tube phragm to a nozzle installed in the chamber. At least a part of the photoresist stored in the first tube phragm is transferred to the second tube phragm.

Abstract: Disclosed is an apparatus based on wireless optical communication, which may include: a light source outputting light; an optical circulator outputting the light in at least one direction; a collimator converting and outputting the light output through the optical circulator into a parallel beam; an optical regulator reflecting the light converted into the parallel beam, and transferring the reflected light to an external apparatus, and receiving the reflected light from the external apparatus, the reflected light being light output by reversely reflecting the light by the external apparatus; an optical detector converting the reflected light into an electric signal to generate an optical signal; and a controller analyzing the optical signal and acquiring an intensity of the reflected light, and calculating central coordinate information of the external apparatus based on the intensity value of the reflected light.

Abstract: A method of fabricating a semiconductor package includes disposing a preliminary semiconductor package on a stage, the preliminary semiconductor package including a substrate to which a pad part is attached, an interposer disposed on the substrate, and a semiconductor chip disposed between the substrate and the interposer. A bonding tool is disposed on the interposer. The bonding tool includes a first region and a second region outside of the first region. The second region of the bonding tool corresponds to the pad part. The interposer and the substrate are bonded to each other.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: Disclosed is an operation method of an electronic apparatus assigning power based on a position of a terminal, the method including receiving data transmission requests from a first terrestrial terminal and a second terrestrial terminal, wherein the first terrestrial terminal and the second terrestrial terminal use overlapped frequency resources, and assigning a first transmission power intensity to the first terrestrial terminal and assigning a second transmission power intensity to the second terrestrial terminal based on a position of the first terrestrial terminal and a position of the second terrestrial terminal.

Abstract: Disclosed is a technology for performing, in an electronic apparatus included in a central station, an uplink- or downlink-related operation by allocating a transmission power intensity based on a transmission and reception capability of a terrestrial terminal.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A circular pipe member is penetrated into the seabed by a suction pressure, and a plurality of circular pipe members are vertically stacked thereon and integrated thereto to construct a cofferdam. When dismantling the cofferdam, the circular pipe members are disassembled and dismantled in order by using a lifting wire installed at a newly constructed structure installed in the inner space of the cofferdam.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A circular pipe member is penetrated into the seabed by a suction pressure, and a plurality of circular pipe members are vertically stacked thereon and integrated thereto to construct a cofferdam. When dismantling the cofferdam, the circular pipe members are disassembled and dismantled in order by using a lifting wire installed at a newly constructed structure installed in the inner space of the cofferdam.