Patents by Inventor Ju Lin

Ju Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250248599
    Abstract: Provided is an otoscope that includes a sensing part. The sensing part includes a case, multiple light sources, and an optical sensing device. The optical sensing device is disposed in the case and sequentially includes a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element along an optical axis from an object side toward an image side. The first lens element, the third lens element and the fifth lens element have positive refracting power. The second lens element and the fourth lens element have refracting power. The otoscope has a total of five lens elements having refracting power, and the multiple light sources are configured to emit infrared light toward the object side.
    Type: Application
    Filed: October 17, 2024
    Publication date: August 7, 2025
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Chih-Ju Lin, Chen-Fu Huang
  • Publication number: 20250254907
    Abstract: A semiconductor device includes a gate structure on a semiconductor fin, a dielectric layer on the gate structure, and a gate contact extending through the dielectric layer to the gate structure. The gate contact includes a first conductive material on the gate structure, a top surface of the first conductive material extending between sidewalls of the dielectric layer, and a second conductive material on the top surface of the first conductive material.
    Type: Application
    Filed: April 23, 2025
    Publication date: August 7, 2025
    Inventors: Kan-Ju Lin, Chien Chang, Chih-Shiun Chou, TaiMin Chang, Hung-Yi Huang, Chih-Wei Chang, Ming-Hsing Tsai, Lin-Yu Huang
  • Patent number: 12371128
    Abstract: A bicycle-used hub gearing system includes a hub gearing and a rotational element. The hub gearing includes a hub and a shift rod formed with a first end located in the hub and a second end located out of the hub. The rotational element includes a slope in contact with the second end of the shift rod. The slope includes various gear points for contact with of the second end of the shift rod, thereby keeping the first end of the shift rod in various depths in the hub corresponding to various gears of the hub gearing.
    Type: Grant
    Filed: January 24, 2024
    Date of Patent: July 29, 2025
    Inventor: Po-Ju Lin
  • Patent number: 12376337
    Abstract: The present disclosure describes a method to form a semiconductor device with air inner spacers. The method includes forming a semiconductor structure on a first side of a substrate. The semiconductor structure includes a fin structure having multiple semiconductor layers on the substrate, an epitaxial structure on the substrate and in contact with the multiple semiconductor layers, a gate structure wrapped around the multiple semiconductor layers, and an inner spacer structure between the gate structure and the epitaxial structure. The method further includes removing a portion of the substrate from a second side of the substrate to expose the epitaxial structure and the inner spacer structure, forming an oxide layer on the epitaxial structure on the second side of the substrate, and removing a portion of the inner spacer structure to form an opening. The second side is opposite to the first side of the substrate.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: July 29, 2025
    Inventors: Fo-Ju Lin, Fang-Wei Lee, Chih-Long Chiang, Li-Te Lin, Pinyen Lin
  • Publication number: 20250240887
    Abstract: A circuit board and a method of manufacturing the same are provided. The circuit board includes two circuit substrates and a conductive layer. The circuit substrates are stacked on each other, while each of the circuit substrates includes an insulation substrate and a conductive via which is disposed inside the insulation substrate. Two opposite sides of the insulation substrate are connected to each other through the conductive via. The conductive layer is disposed between the conductive vias, and the conductive vias are electrically connected to each other through the conductive layer which includes the nanoporous structure.
    Type: Application
    Filed: April 10, 2025
    Publication date: July 24, 2025
    Inventors: Chin-Sheng WANG, Ra-Min TAIN, Guang-Hwa MA, Tzyy-Jang TSENG, Cheng-Ta KO, Pu-Ju LIN
  • Publication number: 20250238927
    Abstract: The present invention relates to a method for analysing DNA fragmentation in a sperm cell by approximating the output of a pre-selected chemical assay of sperm DNA fragmentation. According to a first aspect of the present invention, there is provided a method for analysing DNA fragmentation in a sperm cell by approximating the output of a pre-selected chemical assay of sperm DNA fragmentation, the method comprising: providing an image of the sperm cell, under brightfield and/or phase contrast with a total magnification of 400× to 1000×; evaluating the image of the sperm cell to identify and/or measure a pre-selected biomarker; and approximating the output of the pre-selected chemical assay of sperm DNA fragmentation of the sperm cell by subjecting the identified and/or measured biomarker to a first machine learning analysis.
    Type: Application
    Filed: March 19, 2025
    Publication date: July 24, 2025
    Inventors: Ifthakaar Shaik, Pu-JU LIN, Byron Alexander JACOBS
  • Patent number: 12369250
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: July 22, 2025
    Assignee: Unimicron Technology Corp.
    Inventors: Ping-Tsung Lin, Kai-Ming Yang, Chia-Yu Peng, Pu-Ju Lin, Cheng-Ta Ko
  • Publication number: 20250226291
    Abstract: The present disclosure describes a buried conductive structure in a semiconductor substrate and a method for forming the structure. The structure includes an epitaxial region disposed on a substrate and adjacent to a nanostructured gate layer and a nanostructured channel layer, a first silicide layer disposed within a top portion of the epitaxial region, and a first conductive structure disposed on a top surface of the first silicide layer. The structure further includes a second silicide layer disposed within a bottom portion of the epitaxial region and a second conductive structure disposed on a bottom surface of the second silicide layer and traversing through the substrate, where the second conductive structure includes a first metal layer in contact with the second silicide layer and a second metal layer in contact with the first metal layer.
    Type: Application
    Filed: March 24, 2025
    Publication date: July 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kan-Ju LIN, Lin-Yu Huang, Min-Hsuan Lu, Wei-Yip Loh, Hong-Mao Lee, Harry Chien
  • Publication number: 20250216759
    Abstract: An otoscope with dual frequency bands includes a plurality of first light sources, a plurality of second light sources and an optical sensing device. The first light sources and the second light sources emit light with a first frequency band and a second frequency band respectively, wherein at least a portion of the second frequency band does not overlap with the first frequency band. The optical sensing device includes a first sensing element and a second sensing element. The first sensing element is for sensing light with a third frequency band. The second sensing element is for sensing light with a fourth frequency band. The third frequency band includes the first frequency band, and the fourth frequency band includes the second frequency band.
    Type: Application
    Filed: February 16, 2024
    Publication date: July 3, 2025
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventor: Chih-Ju Lin
  • Publication number: 20250197373
    Abstract: A small molecule compound or salt thereof or solvates of them is provided, wherein the small molecule compound comprises a compound represented by Formula (I) as shown below:
    Type: Application
    Filed: November 29, 2024
    Publication date: June 19, 2025
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wan-Ru CHEN, Chih-Hung CHEN, Yow-Lone CHANG, Shu-Feng CHEN, Hsiang-Ching WANG, Shu-Ling WANG, Yen-Ju LIN, Ming-Hsi WU
  • Publication number: 20250199181
    Abstract: Systems and techniques are described herein for refining depth values. For instance, a method for refining depth values is provided. The method may include obtaining a depth representation of a scene, the depth representation comprising depth values based on a time-of-flight (ToF) signal; obtaining amplitude values corresponding to the depth values of the depth representation, wherein the amplitude values are based on the ToF signal; generating a peak map based on the amplitude values and the depth values; generating a depth-based mask based on the depth values; and generating refined depth values based on the depth values, the peak map, and the depth-based mask.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 19, 2025
    Inventors: Li HONG, Yu-Ju LIN, Silei MA
  • Patent number: 12336252
    Abstract: A method for forming a semiconductor structure includes forming a fin on a semiconductor substrate. The fin includes channel layers and sacrificial layers stacked one on top of the other in an alternating fashion. The method also includes removing a portion of the fin to form a first opening and expose vertical sidewalls of the channel layers and the sacrificial layers, epitaxially growing a source/drain feature in the first opening from the exposed vertical sidewalls of the channel layers and the sacrificial layers, removing another portion of the fin to form a second opening to expose a vertical sidewall of the source/drain feature, depositing a dielectric layer in the second opening to cover the exposed vertical sidewall of the source/drain feature, and replacing the sacrificial layers with a metal gate structure in the second opening. The dielectric layer separates the source/drain feature from contacting the metal gate structure.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: June 17, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Han-Yu Lin, Chansyun David Yang, Tze-Chung Lin, Fang-Wei Lee, Fo-Ju Lin, Li-Te Lin, Pinyen Lin
  • Publication number: 20250183042
    Abstract: A substrate processing method includes an ozone gas etching step of etching an amorphous carbon film in a state in which a front surface of a substrate is dry by supplying ozone gas as etching gas to the amorphous carbon film formed on the front surface of the substrate while heating the substrate and a sulfuric acid-ozone etching step of etching the amorphous carbon film by supplying, after the ozone gas is supplied to the amorphous carbon film, the amorphous carbon film with ozone-containing sulfuric acid that is sulfuric acid in which ozone gas as dissolved gas is dissolved.
    Type: Application
    Filed: November 22, 2024
    Publication date: June 5, 2025
    Inventors: Tsung Ju LIN, Shuichi SHIBATA, Yu YAMAGUCHI
  • Publication number: 20250183040
    Abstract: In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.
    Type: Application
    Filed: February 12, 2025
    Publication date: June 5, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Hsuan LU, Kan-Ju LIN, Lin-Yu HUANG, Sheng-Tsung WANG, Hung-Yi HUANG, Chih-Wei CHANG, Ming-Hsing TSAI, Chih-Hao WANG
  • Patent number: D1084819
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: July 22, 2025
    Assignee: TONG LUNG METAL INDUSTRY CO., LTD.
    Inventors: Ju-Lin Yang, Jui-Chieh Cheng, Yu Lin
  • Patent number: D1084825
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: July 22, 2025
    Assignee: TONG LUNG METAL INDUSTRY CO., LTD.
    Inventors: Yu Lin, Ju-Lin Yang, Jui-Chieh Cheng
  • Patent number: D1085136
    Type: Grant
    Filed: February 26, 2024
    Date of Patent: July 22, 2025
    Assignee: HTC Corporation
    Inventors: Ying-Jing Wang, Fang-Ju Lin, Yun-Jung Lee, Yu-Chien Huang, Kuan-Yi Lien
  • Patent number: D1085137
    Type: Grant
    Filed: February 26, 2024
    Date of Patent: July 22, 2025
    Assignee: HTC Corporation
    Inventors: Ying-Jing Wang, Fang-Ju Lin, Yun-Jung Lee, Yu-Chien Huang, Kuan-Yi Lien
  • Patent number: D1078774
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: June 10, 2025
    Assignee: HTC Corporation
    Inventors: Ying-Jing Wang, Fang-Ju Lin, Yun-Jung Lee, Yu-Chien Huang, Kuan-Yi Lien
  • Patent number: D1078775
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: June 10, 2025
    Assignee: HTC Corporation
    Inventors: Ying-Jing Wang, Fang-Ju Lin, Yun-Jung Lee, Yu-Chien Huang, Kuan-Yi Lien