Abstract: An input/output (IO) circuit with high voltage tolerance is provided. In an integrated circuit, the IO circuit includes a charge pump for generating a bias voltage higher than an internal operating voltage of the charge pump itself, and a switch between an external circuit and an internal circuit of the integrated circuit. When the switch conducts between the external circuit and the internal circuit, the switch provides a clamping voltage according to the bias voltage and a cross voltage of the switch, so that a voltage of the internal circuit is bounded by the clamping voltage to prevent the internal circuit from over-voltage.

Abstract: A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure.

Abstract: A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure.

Abstract: A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure.

Abstract: An input/output (IO) circuit with high voltage tolerance is provided. In an integrated circuit, the IO circuit includes a charge pump for generating a bias voltage higher than an internal operating voltage of the charge pump itself, and a switch between an external circuit and an internal circuit of the integrated circuit. When the switch conducts between the external circuit and the internal circuit, the switch provides a clamping voltage according to the bias voltage and a cross voltage of the switch, so that a voltage of the internal circuit is bounded by the clamping voltage to prevent the internal circuit from over-voltage.

Abstract: A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure.

Abstract: To reduce the effect of the phase shift error originated from the mismatch of the delay units of the clock generator, we propose to add one more set of averaging amplifiers and averaging impedances, such as resistors, into the circuit of the clock generator. In the clock generator, outputs of all delay units connect to inputs of all averaging amplifiers respectively, and the averaging impedances connect the corresponding outputs of two adjacent averaging amplifiers, so as to form a closed loop. When a phase shift error occurs in the delay units, the averaging current through the averaging impedances will decrease the phase shift error in each stage. Specifically, the output impedance of the averaging amplifiers approaches infinite, and thus the resistance of the averaging impedances is relatively small. Therefore almost all signal currents will go through the averaging impedances, and an optimal averaging effect is achieved.

Abstract: To reduce the effect of the phase shift error originated from the mismatch of the delay units of the clock generator, we propose to add one more set of averaging amplifiers and averaging impedances, such as resistors, into the circuit of the clock generator. In the clock generator, outputs of all delay units connect to inputs of all averaging amplifiers respectively, and the averaging impedances connect the corresponding outputs of two adjacent averaging amplifiers, so as to form a closed loop. When a phase shift error occurs in the delay units, the averaging current through the averaging impedances will decrease the phase shift error in each stage. Specifically, the output impedance of the averaging amplifiers approaches infinite, and thus the resistance of the averaging impedances is relatively small. Therefore almost all signal currents will go through the averaging impedances, and an optimal averaging effect is achieved.