Patents by Inventor Ju Pai Lin

Ju Pai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7773451
    Abstract: A circuit for transforming memory address is disclosed. A first memory address is transformed into a second memory address with more bits than the first memory address for providing a memory. The memory space is an even multiple of the maximum of the first memory address. Therefore a large memory can be used as a small memory.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: August 10, 2010
    Assignee: Zi San Electronics Corp.
    Inventor: Ju-Pai Lin
  • Patent number: 7761671
    Abstract: A data displacement bypass system is disclosed, wherein the data displacement bypass system comprises a CPU (Central Processing Unit), a first memory, a plurality of address lines, a plurality of data lines, an OE (Output Enable) line, a CS (Chip Select) line and a data displacement unit. The CPU could output a plurality of address characters, an OE signal and a CS signal, and receive a plurality of data characters. The first memory and the data displacement unit could output the plurality of data characters according to the plurality of address characters, the OE signal and the CS signal received by the first memory and the data displacement unit, wherein the data displacement unit could govern the plurality of data characters inputting to the CPU by outputting high or low voltage.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: July 20, 2010
    Assignee: Zi San Electronics Corp.
    Inventor: Ju-Pai Lin
  • Publication number: 20090049244
    Abstract: A data displacement bypass system is disclosed, wherein the data displacement bypass system comprises a CPU (Central Processing Unit), a first memory, a plurality of address lines, a plurality of data lines, an OE (Output Enable) line, a CS (Chip Select) line and a data displacement unit. The CPU could output a plurality of address characters, an OE signal and a CS signal, and receive a plurality of data characters. The first memory and the data displacement unit could output the plurality of data characters according to the plurality of address characters, the OE signal and the CS signal received by the first memory and the data displacement unit, wherein the data displacement unit could govern the plurality of data characters inputting to the CPU by outputting high or low voltage.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 19, 2009
    Applicant: ZI SAN ELECTRONICS CORP.
    Inventor: Ju-Pai LIn
  • Publication number: 20090024822
    Abstract: A circuit for transforming memory address is disclosed. A first memory address is transformed into a second memory address with more bits than the first memory address for providing a memory. The memory space is an even multiple of the maximum of the first memory address. Therefore a large memory can be used as a small memory.
    Type: Application
    Filed: July 19, 2007
    Publication date: January 22, 2009
    Applicant: ZI SAN ELECTRONICS CORP.
    Inventor: Ju-Pai Lin
  • Patent number: D468759
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: January 14, 2003
    Inventor: Ju Pai Lin
  • Patent number: D420990
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: February 22, 2000
    Assignee: Zi San Electronics Corp.
    Inventor: Ju Pai Lin