Patents by Inventor Ju Peng
Ju Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250035593Abstract: An embodiment of the invention provides a material recognition system. The material recognition system may include a fetching device, at least one sensing device and a processing device. The fetching device may fetch a target object. Each sensing device may include an ultrasound transmitter and an ultrasound receiver. The ultrasound transmitter may transmit an ultrasound emitting signal on the surface of the target object. The ultrasound receiver may receive an ultrasound received signal on the surface of the target object. There is a fixed distance between the ultrasound transmitter and the ultrasound receiver. The processing device may recognize the material of the target object according to the ultrasound emitting signal, the ultrasound received signal, and the fixed distance. In addition, when the fetching device fetches the target object, the ultrasound transmitter and the ultrasound receiver touch the surface of the target object.Type: ApplicationFiled: October 25, 2023Publication date: January 30, 2025Inventors: Chia-Ju PENG, Po-Yu CHENG, Po-Kai HUANG, Wei-Cheng TIAN
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Patent number: 12052840Abstract: A slot cover and an integrated circuit access device having the slot cover are provided. The slot is used to be removably inserted into a slot of an electronic device and includes a frame, a positioning portion, an engaging portion, and at least one conductive elastic plate. The frame includes a center sheet, a first-side sheet configured to connect to an integrated circuit access module, and a second-side sheet. The first-side sheet and the second-side sheet are respectively located at a first side and a second side of the center sheet. The positioning portion and the engaging portion are respectively located above and below the center sheet. The at least one conductive elastic plate is disposed at the second-side sheet. When the slot cover is inserted in the slot of the electronic device, the center sheet blocks an opening of the slot.Type: GrantFiled: May 5, 2022Date of Patent: July 30, 2024Assignee: WISTRON NEWEB CORPORATIONInventors: Tzu-Mao Feng, Yu-Shuo Wu, Ju-Peng Yang
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Publication number: 20230156954Abstract: A slot cover and an integrated circuit access device having the slot cover are provided. The slot is used to be removably inserted into a slot of an electronic device and includes a frame, a positioning portion, an engaging portion, and at least one conductive elastic plate. The frame includes a center sheet, a first-side sheet configured to connect to an integrated circuit access module, and a second-side sheet. The first-side sheet and the second-side sheet are respectively located at a first side and a second side of the center sheet. The positioning portion and the engaging portion are respectively located above and below the center sheet. The at least one conductive elastic plate is disposed at the second-side sheet. When the slot cover is inserted in the slot of the electronic device, the center sheet blocks an opening of the slot.Type: ApplicationFiled: May 5, 2022Publication date: May 18, 2023Inventors: Tzu-Mao FENG, Yu-Shuo WU, Ju-Peng YANG
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Patent number: 11193221Abstract: The present invention concerns a knitted component, especially for an article of apparel or footwear, including: a first knitted layer, including a knitted first portion with a first linear loop density along a first direction, a knitted second portion with a second linear loop density along the first direction, wherein the second linear loop density is greater than the first linear loop density; a second knitted layer, including a knitted third portion with a third linear loop density along a second direction, a knitted fourth portion with a fourth linear loop density along the second direction; wherein the first knitted layer is connected to the second knitted layer.Type: GrantFiled: December 21, 2018Date of Patent: December 7, 2021Assignee: adidas AGInventors: Jessica Dorothy Janine Hymas, Michael Braun, Yu Ju Peng
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Patent number: 10683297Abstract: The present invention provides novel heteroaryl compounds, pharmaceutical acceptable salts and formulations thereof. They are useful in preventing, managing, treating or lessening the severity of a protein kinase-mediated disease. The invention also provides pharmaceutically acceptable compositions comprising such compounds and methods of using the compositions in the treatment of protein kinase-mediated disease.Type: GrantFiled: November 10, 2018Date of Patent: June 16, 2020Assignees: CALITOR SCIENCES, LLC, NORTH & SOUTH BROTHER PHARMACY INVESTMENT COMPANY LIMITEDInventors: Ning Xi, Minxiong Li, Ju Peng, Xiaobo Li, Tao Zhang, Haiyang Hu, Wuhong Chen, Changlin Bai, Donghua Ke, Peng Chen
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Publication number: 20190191821Abstract: The present invention concerns a knitted component, especially for an article of apparel or footwear, including: a first knitted layer, including a knitted first portion with a first linear loop density along a first direction, a knitted second portion with a second linear loop density along the first direction, wherein the second linear loop density is greater than the first linear loop density; a second knitted layer, including a knitted third portion with a third linear loop density along a second direction, a knitted fourth portion with a fourth linear loop density along the second direction; wherein the first knitted layer is connected to the second knitted layer.Type: ApplicationFiled: December 21, 2018Publication date: June 27, 2019Inventors: Jessica Dorothy Janine HYMAS, Michael BRAUN, Yu Ju PENG
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Publication number: 20190152977Abstract: The present invention provides novel heteroaryl compounds, pharmaceutical acceptable salts and formulations thereof. They are useful in preventing, managing, treating or lessening the severity of a protein kinase-mediated disease. The invention also provides pharmaceutically acceptable compositions comprising such compounds and methods of using the compositions in the treatment of protein kinase-mediated disease.Type: ApplicationFiled: November 10, 2018Publication date: May 23, 2019Applicant: Northern Industrial Area,Inventors: Ning Xi, Minxiong Li, Ju Peng, Xiaobo Li, Tao Zhang, Haiyang Hu, Wuhong Chen, Changlin Bai, Donghua Ke, Peng Chen
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Patent number: 10119561Abstract: A latch module includes a fixing member and a sliding member. A first surface of the fixing member is configured to align and engage with a mounting surface of a detachable device. A sliding unit of the sliding member is relative to a guiding unit of the fixing member and allows the sliding member to slide linearly with respect to the fixing member. The sliding member includes a pushing portion corresponding to a switching column on a resilient arm of the fixing member. While the sliding member is slid to a first position, the switching column is away from the pushing portion and a convex portion of the resilient arm tends to push against the mounting surface. While the sliding member is slid to a second position, the pushing portion pushes the switching column to drive the convex portion away from the mounting surface.Type: GrantFiled: December 26, 2017Date of Patent: November 6, 2018Assignee: DELTA ELECTRONICS, INC.Inventors: Chii-How Chang, Yao-Ju Peng
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Patent number: 8927986Abstract: The disclosure provides a p-type metal oxide semiconductor material. The p-type metal oxide semiconductor material has the following formula: In1?xGa1?yMx+yZnO4+m, wherein M is Ca, Mg, or Cu, 0<x+y?0.1, 0?m?3, and 0<x, 0?y, or 0?x, 0<y, and wherein a hole carrier concentration of the p-type metal oxide semiconductor material is in a range of 1×1015˜6×1019 cm?3.Type: GrantFiled: September 27, 2013Date of Patent: January 6, 2015Assignee: Industrial Technology Research InstituteInventors: Tzu-Chi Chou, Kuo-Chuang Chiu, Show-Ju Peng, Shan-Haw Chiou, Yu-Tsz Shie
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Publication number: 20140091302Abstract: The disclosure provides a p-type metal oxide semiconductor material. The p-type metal oxide semiconductor material has the following formula: In1?xGa1?yMx+yZnO4+m, wherein M is Ca, Mg, or Cu, 0<x+y?0.1, 0?m?3, and 0<x, 0?y, or 0?x, 0<y, and wherein a hole carrier concentration of the p-type metal oxide semiconductor material is in a range of 1×1015˜6×1019 cm?3.Type: ApplicationFiled: September 27, 2013Publication date: April 3, 2014Applicant: Industrial Technology Research InstituteInventors: Tzu-Chi CHOU, Kuo-Chuang CHIU, Show-Ju PENG, Shan-Haw CHIOU, Yu-Tsz SHIE
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Patent number: 8161354Abstract: A flash memory controller includes a control unit, a buffer, an error correction code (ECC) module, and a configuring unit. The flash memory has a data area for storing the data content and a first spare area for storing a first ECC value corresponding to the data content. The ECC module utilizes the data content for generating a second ECC value and comparing the second ECC value with the first ECC value to determine whether the data content comprises a plurality of errors. The configuring unit computes the amount of the errors to determine whether the amount of the errors exceeds a predetermined threshold. If The configuring unit configures the data area and assigns a portion of the data area to be a second spare area. The first and the second spare area are associated with the ECC capability to allow the ECC module to correct the errors.Type: GrantFiled: October 16, 2008Date of Patent: April 17, 2012Assignee: Genesys Logic, Inc.Inventor: Ju-peng Chen
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Patent number: 8069396Abstract: A storage device for refreshing pages of a flash memory comprises a flash memory, an ECC detector and a controller. The flash memory has a plurality of pages, and each page comprises a data area for storing data and a spare area for storing error correction code (ECC) corresponding to the data. The ECC detector is used to get the number of error bits of each page. The controller coupled to the ECC detector is used for storing data and ECC in a first page to a second page when a number of used bytes of the ECC stored in a spare area of the first page exceeds a first predetermined value. A number of used bytes of the ECC stored in a spare area of the second page is less than the first predetermined value. The second page is a blank page.Type: GrantFiled: August 25, 2008Date of Patent: November 29, 2011Assignee: Genesys Logic, Inc.Inventors: Ju-peng Chen, Chih-jung Lin
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Patent number: 7934053Abstract: A flash memory storage device for boosting efficiency in accessing flash memory is disclosed. The flash memory storage device provides a Multi-level cell (MLC) flash memory for storing data, a single-level cell (SLC) flash memory for storing data, and a control unit for determining whether to store a file into the MLC NAND flash memory or a SLC NAND flash memory based on the file's data characteristics.Type: GrantFiled: April 16, 2008Date of Patent: April 26, 2011Assignee: Genesys Logic, Inc.Inventors: Ju-peng Chen, Nei-chiung Perng
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Patent number: 7778101Abstract: A memory module and a method of performing the same for access of an external electronic device are provided herein. The memory module includes a NAND-type flash memory, a dynamic random access memory (DRAM) unit, and a memory controller. The dynamic random access memory unit which is electrically connected to the NAND-type flash memory includes a dynamic random access memory and an internal power. The memory controller is used for controlling at least one of both the NAND-type flash memory and the dynamic random access memory unit. When the memory module is disconnected with the external electronic device, the internal power of the dynamic random access memory unit powers the dynamic random access memory, actively. Accordingly, data stored in the dynamic random access memory will be retained.Type: GrantFiled: September 5, 2008Date of Patent: August 17, 2010Assignee: Genesys Logic, Inc.Inventor: Ju-peng Chen
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Publication number: 20100123661Abstract: A slide presentation system and a method of performing the same which are capable of providing a real-time interaction among conference presenter and attendees are disclosed. When a projector projects at least one slide to as map a screened image generated from a host, an image identifying unit identifies a pointer after an image capturing unit imaging the content expressed on the projected slide. After the pointer is identified, an orienting unit detects a two-dimension coordinate value with reference to where the pointer is pointed on the projected slide as the same as the screened image of the host. Then, the two-dimension coordinate values are transmitted to the host for determining an action of the pointer according to the two-dimension coordinate value with reference to the screened image of the host. By the present invention, the pointer pointing on the projected slide can be directly implemented as functioning a mouse.Type: ApplicationFiled: November 19, 2008Publication date: May 20, 2010Applicant: GENESYS LOGIC, INC.Inventor: Ju-peng Chen
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Publication number: 20100100797Abstract: A dual mode error correction code (ECC) apparatus for the flash memory and method thereof are described. The dual mode error correction code (ECC) apparatus includes a syndrome detection unit, a first ECC unit, a second ECC unit, a switch module, and an interface module. The syndrome detection unit detects the data content for computing the amount of errors in the data content to determine whether the amount of the errors exceeds a pre-determined threshold value. The first ECC unit corrects the errors in the data content based on a first coding mode. The second ECC unit corrects the errors in the data content based on a second coding mode. The switch module either switches to the first ECC unit for activating the first coding mode of the first ECC unit if the amount of the errors is fewer than a pre-determined threshold value or switches to the second ECC unit for activating the second coding mode of the second ECC unit if the amount of the errors is greater than the pre-determined threshold value.Type: ApplicationFiled: October 16, 2008Publication date: April 22, 2010Applicant: GENESYS LOGIC, INC.Inventor: Ju-peng Chen
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Publication number: 20100100763Abstract: A flash memory controller having a configuring unit of error correction code (ECC) capability and method thereof are described. The flash memory controller includes a control unit, a buffer, an ECC module, and a configuring unit. The flash memory has a data area for storing the data content and a first spare area for storing a first ECC value corresponding to the data content. The ECC module utilizes the data content for generating a second ECC value and comparing the second ECC value with the first ECC value to determine whether the data content comprises a plurality of errors based on the compared result of the first ECC value and the second ECC value. The configuring unit computes the amount of the errors if the data content has the errors to determine whether the amount of the errors exceeds a predetermined threshold.Type: ApplicationFiled: October 16, 2008Publication date: April 22, 2010Applicant: GENESYS LOGIC, INC.Inventor: Ju-peng Chen
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Publication number: 20100061133Abstract: A memory module and a method of performing the same for access of an external electronic device are provided herein. The memory module includes a NAND-type flash memory, a dynamic random access memory (DRAM) unit, and a memory controller. The dynamic random access memory unit which is electrically connected to the NAND-type flash memory includes a dynamic random access memory and an internal power. The memory controller is used for controlling at least one of both the NAND-type flash memory and the dynamic random access memory unit. When the memory module is disconnected with the external electronic device, the internal power of the dynamic random access memory unit powers the dynamic random access memory, actively. Accordingly, data stored in the dynamic random access memory will be retained.Type: ApplicationFiled: September 5, 2008Publication date: March 11, 2010Applicant: GENESYS LOGIC, INC.Inventor: Ju-peng Chen
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Publication number: 20100049904Abstract: A storage device includes a multi-level cell flash memory having a plurality of physical memory cells, a read controller, and a write controller. The physical memory cells form a first page and a second page. The write controller in response to a first request is used for writing first data into the first page, duplicating the first data as a second data and writing the second data into the second page. The read controller is used for adjusting the stored data value complying with a desired storing value. Each physical memory cell comprises four threshold voltage ranges indicative of two-bit logical values. The two-bit data is assigned as a first logical value accordingly in response to a two-bit data corresponding to a first and second threshold voltage ranges in a first physical memory cell. The two-bit data is assigned as a second logical value accordingly in response to a two-bit data corresponding to a third and fourth threshold voltage ranges in a second physical memory cell.Type: ApplicationFiled: November 24, 2008Publication date: February 25, 2010Applicant: GENESYS LOGIC, INC.Inventor: Ju-peng Chen
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Publication number: 20100037003Abstract: A flash memory control apparatus having a signal-converting module is described. The signal-converting module includes a primary controller, a signal-converting module, a data buffer, and a secondary controller. The primary controller generates a plurality of control signals based on a first control interface. The signal-converting module receiving a reading enable signal and a writing enable signal of the control signals and converts the reading enable signal and the writing enable signal into a writing/reading signal based on a second control interface. The data buffer stores the data from the primary controller according to the first control interface and stores the data from the flash memory according to the second control interface. The secondary controller transmits the writing/reading signal, a clock signal and a data strobe signal to the flash memory based on the second control interface.Type: ApplicationFiled: December 3, 2008Publication date: February 11, 2010Applicant: GENESYS LOGIC, INC.Inventors: Ju-peng Chen, Yu-jen Hsu