Patents by Inventor Juyeon JANG

Juyeon JANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9947668
    Abstract: Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: April 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dongjin Lee, Sungho Jang, Jiyoung Kim, Kang-Uk Kim, Chan Min Lee, Juyeon Jang
  • Publication number: 20150303201
    Abstract: Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region.
    Type: Application
    Filed: January 7, 2015
    Publication date: October 22, 2015
    Inventors: Dongjin LEE, Sungho JANG, Jiyoung KIM, Kang-Uk KIM, Chan Min LEE, Juyeon JANG