Patents by Inventor Ju Yung Sohn

Ju Yung Sohn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6395582
    Abstract: A tape ball grid array (TBGA) semiconductor package having a one metal layer interconnect substrate is provided. Further provided is a method for making the TBGA package having electrical connection through the one metal layer interconnect substrate down to a ground plane. The method includes: (a) defining at least one via hole through the one metal layer interconnect substrate; (b) filling the at least one via hole of the one metal layer interconnect substrate with a first solder ball; (c) reflowing the first solder ball; (d) placing a second solder ball over the reflowed first solder ball; and (e) reflowing the second solder ball to attach the second solder ball to the reflowed first solder ball. The reflowed first solder ball and the reflowed second solder ball form a ground via connection to the ground plane of the TBGA.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: May 28, 2002
    Assignee: Signetics
    Inventors: Ju Yung Sohn, Seung Ryul Ryu, Marcos Karnezos
  • Publication number: 20020050407
    Abstract: A package for a semiconductor chip is provided. The package includes a ground conducting layer. A one metal layer interconnect substrate is attached to the ground conducting layer. The one metal layer interconnect substrate includes a via hole defining a path to the ground conducting layer. A conductive material substantially filling the path defined by the via hole is provided. The conductive material is in contact with the ground conducting layer.
    Type: Application
    Filed: December 7, 2001
    Publication date: May 2, 2002
    Applicant: SIGNETICS KP CO., LTD.
    Inventors: Ju Yung Sohn, Seung Ryul Ryu