Abstract: Provided are a computer program product, system, and method for determining cache performance using a ghost cache list. Tracks in the cache are indicated in a cache list. A track demoted from the cache is indicated in a ghost cache list in response to demoting the track in the cache. The demoted track is not indicated in the cache list. During caching operations, information is gathered on a number of cache hits comprising accesses to tracks indicated in the cache list and a number of ghost cache hits comprising accesses to tracks indicated in the ghost cache list. The gathered information on the cache hits and the ghost cache hits is used to generate information on cache performance improvements that would occur if the cache was increased in size to cache tracks in the ghost cache list.

Abstract: Provided are a computer program product, system, and method for determining cache performance using a ghost cache list. Tracks in the cache are indicated in a cache list. A track demoted from the cache is indicated in a ghost cache list in response to demoting the track in the cache. The demoted track is not indicated in the cache list. During caching operations, information is gathered on a number of cache hits comprising accesses to tracks indicated in the cache list and a number of ghost cache hits comprising accesses to tracks indicated in the ghost cache list. The gathered information on the cache hits and the ghost cache hits is used to generate information on cache performance improvements that would occur if the cache was increased in size to cache tracks in the ghost cache list.

Abstract: A dual line active automatic transfer switch (ATS) is provided. A first switch structure is connected to a first PSU of the plurality of PSUs, and operable between a first position connecting a first input line of the dual line and a second position connecting a second input line of the dual line with the one PSU. A second switch structure is connected to at least one additional PSU of the plurality of PSUs, and operable between a third position connecting the first input line and a fourth position connecting the second input line with the at least one additional PSU. The first and second switch structures are operable between each of the first, second, third, and fourth positions to alternatively connect each of the plurality of PSUs to one of the first and second input lines and connect, when each of the dual lines is charged, both of the first and second input lines to at least one of the plurality of PSUs.

Abstract: A dual line active automatic transfer switch (ATS) is provided. A first switch structure is connected to a first PSU of the plurality of PSUs, and operable between a first position connecting a first input line of the dual line and a second position connecting a second input line of the dual line with the one PSU. A second switch structure is connected to at least one additional PSU of the plurality of PSUs, and operable between a third position connecting the first input line and a fourth position connecting the second input line with the at least one additional PSU. The first and second switch structures are operable between each of the first, second, third, and fourth positions to alternatively connect each of the plurality of PSUs to one of the first and second input lines and connect, when each of the dual lines is charged, both of the first and second input lines to at least one of the plurality of PSUs.

Abstract: A method, system, and computer-usable medium for implementing a hard disk drive data clear and purge. In a preferred embodiment of the present invention, a processor sends a predetermined data pattern to be written to a hard disk drive and issues a command for the hard disk drive to write the predetermined data pattern to an entire surface of the hard disk drive. The hard disk drive updates the entire surface with the predetermined data pattern and the processor verifies that the entire surface of the hard disk drive is updated with the predetermined data pattern.