Abstract: An apparatus for controlling access to a time division multiplexed (TDM) bus includes a frame address register having a plurality of storage registers for storing a plurality of frame addresses designated for use in communicating over said TDM bus. A frame address latch stores a current frame address. A frame comparator, coupled to the frame address register and the frame address latch, compares the designated frame addresses with the current frame address and produces a first signal indicative of the storage register containing a frame address matching the current frame address. A time slot register has a plurality of storage registers for storing a time slot number designated for use in communicating over said TDM bus. A time slot generator generates a current time slot number.

Abstract: A method for changing the data transmission rates in a synchronous data communication system including a first modem and a second modem coupled together through a transmission channel, the transmission channel including a first path for transmissions from the first modem to the second modem and a second path for transmission from the second modem to the first modem, includes the steps of determining, at the first modem, that the second path of the transmission channel is adequately high in quality to support an increase in transmission rate. Next it is determined, at the second modem, that the first path of the transmission channel is adequately high in quality to support an increase in transmission rate. A training sequence is then transmitted at an increased transmission rate from the second modem to the first modem. Next, a training sequence is transmitted at the increased transmission rate from the first modem to the second modem.