Abstract: In an embodiment, an apparatus is disclosed that includes a power management integrated circuit (PMIC). The PMIC includes a voltage regulator supplied by a first power source and configured to generate a first output and a charge pump supplied by a second power source and configured to generate a second output. A bias voltage output of the power management integrated circuit is generated based at least in part on the first output and the second output. The charge pump is configured to adjust the second output based at least in part on a comparison between the bias voltage output and a reference voltage.

Abstract: In an embodiment, an apparatus is disclosed that includes a power management integrated circuit (PMIC). The PMIC includes a voltage regulator supplied by a first power source and configured to generate a first output and a charge pump supplied by a second power source and configured to generate a second output. A bias voltage output of the power management integrated circuit is generated based at least in part on the first output and the second output. The charge pump is configured to adjust the second output based at least in part on a comparison between the bias voltage output and a reference voltage.

Abstract: Irridium complexes with molecular formula of L3Ir, together with application thereof and organic electroluminescent devices, wherein Ir is the central metal atom and L is a ligand. The structure of these complexes is of the following formula (I): Ar is selected from substituted or unsubstituted aryl groups with 6 to 30 carbon atoms, and substituted or unsubstituted heterocyclic aryl groups with 4 to 30 carbon atoms. R1 to R7 are each independently selected from atoms or groups described herein. The substituent group on above-mentioned Ar or R1 to R7 is independently selected from F, Cl, Br, I, CHO, CN, substituted or unsubstituted alkyl or cycloalkyl groups with 1 to 30 carbon atoms, fluoroalkyl groups, alkoxy groups, and thioalkoxy groups.

Abstract: This invention provides a type of Iridium Complexes with molecular formula of L3Ir, together with its application and organic electroluminescent devices, wherein Ir is the central metal atom and L is a ligand. The structure of these complexes is of the following formula (I): Ar is selected from substituted or unsubstituted aryl groups with 6 to 30 carbon atoms, and substituted or unsubstituted heterocyclic aryl groups with 4 to 30 carbon atoms.

Abstract: A divider can include a phase selection circuit that switches between a plurality of phase-separated clock signals in response to a fractional control signal to form a selected clock signal, the selected clock signal being utilized to generate a second clock signal; and a counter that receives the second clock signal and generates the fractional control signal and a transition control signal, the transition control signal indicating when the second clock signal should switch states in response to a transition of the selected clock signal, the counter generating a feed-back clock signal.

Abstract: A novel solution that combines the technologies of fractional divider and phase selection is provided to implement over-clocking for CPU PLL in PC clock generator with a set resolution that is independent of the clock frequency.

Abstract: A method and apparatus for generating a spread spectrum reference clock is presented. A method and apparatus is presented for receiving a spread spectrum parameter from a phase lock loop, wherein the spread spectrum parameter includes a multiple-level parameter comprising a plurality of phase signals; quantizing a spread spectrum profile associated with the spread spectrum parameter; mapping the quantized profile; generating control signals based on the mapping, wherein the control signals include an integer control signal and a phase control signal; dividing a phase signal of the plurality of phase signals with the integer control signal; synchronizing the divided phase signal using the phase control signal; and providing a reference clock for a spread spectrum clock generator based on the synchronizing.

Abstract: A multi-bit counter is provided. The multi-bit counter includes a plurality of asynchronous base counter cells coupled in series, the asynchronous base counter cells having a plurality of input terminals. The multi-bit counter also includes at least one logic gate coupled to at least one of the input terminals of at least one of the plurality of asynchronous base counter cells, a reload signal being input into the asynchronous base counter cells, a clock signal being input into the asynchronous base counter cells, and an input voltage being input into the asynchronous base counter cells, wherein the multi-bit counter is synchronous with the clock signal.

Abstract: A method and circuit for phase and frequency detection having zero static phase error for use in a phase-locked loop system is presented. The phase and frequency detector utilizes a first phase and frequency detector configured to generate first and second pulsed PFD signals. Pulse blocking circuitry is utilized to provide first and second output signals based on the first and second pulsed signals respectively, wherein a time period when both first and second output signals are asserted is substantially reduced from a time period when both first and second pulsed signals are asserted. By reducing the time the first and second output signals are simultaneously asserted, the effects of charge pump current source mismatch are minimized and static phase error is reduced.

Abstract: A divider can include a phase selection circuit that switches between a plurality of phase-separated clock signals in response to a fractional control signal to form a selected clock signal, the selected clock signal being utilized to generate a second clock signal; and a counter that receives the second clock signal and generates the fractional control signal and a transition control signal, the transition control signal indicating when the second clock signal should switch states in response to a transition of the selected clock signal, the counter generating a feed-back clock signal.

Abstract: A novel solution that combines the technologies of fractional divider and phase selection is provided to implement over-clocking for CPU PLL in PC clock generator with a set resolution that is independent of the clock frequency.

Abstract: A method and circuit for phase and frequency detection having zero static phase error for use in a phase-locked loop system is presented. The phase and frequency detector utilizes a first phase and frequency detector configured to generate first and second pulsed PFD signals. Pulse blocking circuitry is utilized to provide first and second output signals based on the first and second pulsed signals respectively, wherein a time period when both first and second output signals are asserted is substantially reduced from a time period when both first and second pulsed signals are asserted. By reducing the time the first and second output signals are simultaneously asserted, the effects of charge pump current source mismatch are minimized and static phase error is reduced.

Abstract: A multi-bit counter is provided. The multi-bit counter includes a plurality of asynchronous base counter cells coupled in series, the asynchronous base counter cells having a plurality of input terminals. The multi-bit counter also includes at least one logic gate coupled to at least one of the input terminals of at least one of the plurality of asynchronous base counter cells, a reload signal being input into the asynchronous base counter cells, a clock signal being input into the asynchronous base counter cells, and an input voltage being input into the asynchronous base counter cells, wherein the multi-bit counter is synchronous with the clock signal.

Abstract: A method and apparatus for generating a spread spectrum reference clock is presented. A method and apparatus is presented for receiving a spread spectrum parameter from a phase lock loop, wherein the spread spectrum parameter includes a multiple-level parameter comprising a plurality of phase signals; quantizing a spread spectrum profile associated with the spread spectrum parameter; mapping the quantized profile; generating control signals based on the mapping, wherein the control signals include an integer control signal and a phase control signal; dividing a phase signal of the plurality of phase signals with the integer control signal; synchronizing the divided phase signal using the phase control signal; and providing a reference clock for a spread spectrum clock generator based on the synchronizing.

Abstract: A class of organic metal complexes with mixed ligands for organic light emitting diodes are designed and characterized as the formula:(L2L3M)n. In this formula: L2 is a bidentate ligand which has at least one coordinate atom of oxygen; L3 is a tridentate ligand with three chelate points; M is trivalent metal selected from the group consisting of Al, Ga, In, Tl, and Ir; and n is an integer of from 1 to 2. In Formula (3), X, Y independently represent CH or N and II, III are unsubstituted or substituted aryl or heteroalkyl groups. The substituent groups can be alkyl having 1–8 carbon atoms, halogen, cyano, amino, amido, sulfonyl, carbonyl, aryl, or heteroalkyl groups such as furan, thiophene, pyrrole, pyridine, etc.

Abstract: The present invention relates to a series of carbazole derivatives which are used in organic electroluminescent devices as the phosphorescent host materials of the emissive layers. The carbazole derivatives have glass transition temperature of between 70° C. and 220° C. and triplet energy of 2.62 eV or more. The carbazole derivatives comprise two carbazole groups and alkyl group and/or spiro group inserted between the carbazole group and aromatic group, which is represented by formula 1. The carbazole derivatives according to the present invention are used as host materials for the triplet emissive dyes and they have high energy and stability. They can also reduce the converse energy transfer from the dye molecules to the host molecules and improve the luminance and efficiency of the OLEDs, especially the efficiency and lifetime of the blue triplet OLEDs.

Abstract: The present invention relates to a series of carbazole derivatives which are used in organic electroluminescent devices as the phosphorescent host materials of the emissive layers. The carbazole derivatives have glass transition temperature of between 70° C. and 220° C. and triplet energy of 2.62 eV or more. The carbazole derivatives comprise two carbazole groups and alkyl group and/or spiro group inserted between the carbazole group and aromatic group, which is represented by formula 1. The carbazole derivatives according to the present invention are used as host materials for the triplet emissive dyes and they have high energy and stability. They can also reduce the converse energy transfer from the dye molecules to the host molecules and improve the luminance and efficiency of the OLEDs, especially the efficiency and lifetime of the blue triplet OLEDs.

Abstract: A class of organic metal complexes with mixed ligands for organic light emitting diodes are designed and characterized as the formula:(L2L3M)n. In this formula: L2 is a bidentate ligand which has at least one coordinate atom of oxygen; L3 is a tridentate ligand with three chelate points; M is trivalent metal selected from the group consisting of Al, Ga, In, Tl, and Ir; and n is an integer of from 1 to 2. In Formula (3), X, Y independently represent CH or N and II, III are unsubstituted or substituted aryl or heteroalkyl groups. The substituent groups can be alkyl having 1-8 carbon atoms, halogen, cyano, amino, amido, sulfonyl, carbonyl, aryl, or heteroalkyl groups such as furan, thiophene, pyrrole, pyridine, etc. These complexes can be used as emitting materials or electron transporting materials in organic EL devices.