Patents by Inventor Juan Qu

Juan Qu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11987789
    Abstract: The present disclosure relates to fluidic systems and devices for processing, extracting, or purifying one or more analytes. These systems and devices can be used for processing samples and extracting nucleic acids, for example by isotachophoresis. In particular, the systems and related methods can allow for extraction of nucleic acids, including non-crosslinked nucleic acids, from samples such as tissue or cells. The systems and devices can also be used for multiplex parallel sample processing.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: May 21, 2024
    Assignee: Purigen Biosystems, Inc.
    Inventors: Lewis A. Marshall, Amy L. Hiddessen, Nathan P. Hoverter, Klint A. Rose, Juan G. Santiago, Matthew S. Munson, Janine Mok, Sean Arin, Yatian Qu, Andrew Lee, Michael Christopher De Renzi
  • Patent number: 11755532
    Abstract: A method for generating graphic display interface, comprising: receiving an request to generate a graphic display interface comprising at least a client ID; generating a plurality of graphic data structures based on at least one of the request or a priority list, each of the graphic data structures corresponding to a identifier; associating for each of the graphic data structures, an item graphic; tagging each of the graphic data structures with one or more tags, the tagging comprises: determine that the client ID matches at least one member ID; and determine, for each of the graphic data structures, that the associated identifier has a first status, and tagging the graphic data structures with a first tag upon the determination; and associating for each of the graphic data structures based on the associated tags, one of a plurality of service graphics; and generating instruction for the graphic display interface.
    Type: Grant
    Filed: December 24, 2021
    Date of Patent: September 12, 2023
    Assignee: COUPANG CORP.
    Inventors: Ku Kang, JungJoon Park, Duhyeong Kim, Tae IL Kim, Ki Woong Jang, Prakash Kadel, Seongwook Ahn, Kyung Hoon Min, Nam Yeong Goo, Yilu Shen, Li Li, Juan Qu
  • Publication number: 20220164865
    Abstract: A method for generating graphic display interface, comprising: receiving an request to generate a graphic display interface comprising at least a client ID; generating a plurality of graphic data structures based on at least one of the request or a priority list, each of the graphic data structures corresponding to a identifier; associating for each of the graphic data structures, an item graphic; tagging each of the graphic data structures with one or more tags, the tagging comprises: determine that the client ID matches at least one member ID; and determine, for each of the graphic data structures, that the associated identifier has a first status, and tagging the graphic data structures with a first tag upon the determination; and associating for each of the graphic data structures based on the associated tags, one of a plurality of service graphics; and generating instruction for the graphic display interface.
    Type: Application
    Filed: December 24, 2021
    Publication date: May 26, 2022
    Inventors: Ku KANG, JungJoon PARK, Duhyeong KIM, Tae IL KIM, Ki Woong JANG, Prakash KADEL, Seongwook AHN, Kyung Hoon MIN, Nam Yeong GOO, Yilu SHEN, Li LI, Juan QU
  • Patent number: 11243913
    Abstract: A method for generating graphic display interface, comprising: receiving an request to generate a graphic display interface comprising at least a client ID; generating a plurality of graphic data structures based on at least one of the request or a priority list, each of the graphic data structures corresponding to a identifier; associating for each of the graphic data structures, an item graphic; tagging each of the graphic data structures with one or more tags, the tagging comprises: determine that the client ID matches at least one member ID; and determine, for each of the graphic data structures, that the associated identifier has a first status, and tagging the graphic data structures with a first tag upon the determination; and associating for each of the graphic data structures based on the associated tags, one of a plurality of service graphics; and generating instruction for the graphic display interface.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: February 8, 2022
    Assignee: Coupang Corp.
    Inventors: Ku Kang, JungJoon Park, Duhyeong Kim, Tae Il Kim, Ki Woong Jang, Prakash Kadel, Seongwook Ahn, Kyung Hoon Min, Nam Yeong Goo, Yilu Shen, Li Li, Juan Qu
  • Patent number: 9125314
    Abstract: A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: September 1, 2015
    Assignee: CELESTICA TECHNOLOGY CONSULTANCY (SHANGHAI) CO. LTD.
    Inventor: Li Juan Qu
  • Publication number: 20130327565
    Abstract: A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 12, 2013
    Inventor: Li Juan QU