Patents by Inventor Juan ZENG

Juan ZENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12159840
    Abstract: Embodiments disclosed herein include multi-die packages with interconnects between the dies. In an embodiment, an electronic package comprises a package substrate, and a first die over the package substrate. In an embodiment, the first die comprises a first IO bump map, where bumps of the first IO bump map have a first pitch. In an embodiment, the electronic package further comprises a second die over the package substrate. In an embodiment, the second die comprises a second IO bump map, where bumps of the second IO bump map have a second pitch that is different than the first pitch. In an embodiment, the electronic package further comprises interconnects between the first IO bump map and the second IO bump map.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: December 3, 2024
    Assignee: Intel Corporation
    Inventors: Zhiguo Qian, Gerald Pasdast, Juan Zeng, Peipei Wang, Ahmad Siddiqui, Lakshmipriya Seshan
  • Publication number: 20240383192
    Abstract: Examples of methods are described herein. In some examples, a method includes determining a first portion within a build volume. In some examples, the method includes packing first objects in the first portion. In some examples, the method includes packing using a genetic procedure. In some examples, the method includes packing, using the genetic procedure, second objects in the build volume.
    Type: Application
    Filed: November 10, 2021
    Publication date: November 21, 2024
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY , L.P.
    Inventors: Juan Carlos CATANA SALAZAR, Marco Antonio MEDRANO ACOSTA, Jun ZENG
  • Patent number: 12145947
    Abstract: Provided herein are compounds, such as compounds of Formula (I), Formula (I-A), Formula (I-B), or pharmaceutically acceptable salts of any one there, useful for modulating KRAS GD12 and/or other G12 mutants.
    Type: Grant
    Filed: November 7, 2023
    Date of Patent: November 19, 2024
    Assignee: QUANTA THERAPEUTICS, INC.
    Inventors: Hong Lin, Juan Luengo, Neil Johnson, Audrey Hospital, Jin Zeng
  • Patent number: 12145319
    Abstract: Systems and methods of predicting temperature during a build of a three-dimensional (3D) part include determining a temperature profile at a plurality of layers of a part based on geometric characteristics of the 3D part as defined by a 3D part file, and adjusting a process parameter of the build based on the determined temperature.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 19, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sunil Kothari, Tod Heiles, Juan Carlos Catana Salazar, Jun Zeng, Gary J. Dispoto
  • Publication number: 20240303928
    Abstract: According to examples, a processor may identify locations on a digital 3D model of an object corresponding to positions at which features are to be added to the object. For each of a plurality of locations of the identified locations, the processor may identify displacements of each of a plurality of patch points around the location from the surface of the digital 3D model. The processor may also create a map of the digital 3D model that encodes the identified displacements of the patch points around the locations, in which a 3D fabrication system is to fabricate the object to include the plurality of features based on the digital 3D model and the created map.
    Type: Application
    Filed: March 31, 2021
    Publication date: September 12, 2024
    Inventors: Juan Carlos CATANA SALAZAR, Jun ZENG, Sergio GONZALEZ MARTIN
  • Publication number: 20240272035
    Abstract: Methods, apparatuses, systems, computer readable media, and a computer product for detecting a gas leak of a gas tank. In a method, at least one inside temperature is determined for the gas tank based on a plurality of outside temperatures that are collected outside the gas tank, the at least one inside temperature being estimated for at least one inside position within the gas tank during an operation of the gas tank. A gas pressure within the gas tank under a standard temperature is obtained based on the at least one inside temperature. The gas leak of the gas tank is detected based on the gas pressure.
    Type: Application
    Filed: September 24, 2021
    Publication date: August 15, 2024
    Inventors: Lusha Zeng, Juan Wen, Guoming Chuai, Wei Zheng, Yanguo Chen
  • Publication number: 20220271912
    Abstract: Embodiments herein may relate to a die for use in a multi-die package. The die may include clock circuitry that is able to identify a phase of a data signal to be transmitted and a phase of a clock signal to be transmitted on a die-to-die (D2D) link. The clock circuitry may further be configured adjust the phase of the clock signal such that the phase of the clock signal is approximately 90 degrees from the phase of the data signal such that the clock signal and the data signal are received by a receiver die of the D2D link with a 90 degree phase difference. Other embodiments may be described and claimed.
    Type: Application
    Filed: May 12, 2022
    Publication date: August 25, 2022
    Inventors: Gerald Pasdast, Peipei Wang, Lakshmipriya Seshan, Juan Zeng, Zuoguo Wu, Zhiguo Qian, Narasimha Lanka, Debendra Das Sharma, Swadesh Choudhary
  • Publication number: 20210398906
    Abstract: Embodiments disclosed herein include multi-die packages with interconnects between the dies. In an embodiment, an electronic package comprises a package substrate, and a first die over the package substrate. In an embodiment, the first die comprises a first IO bump map, where bumps of the first IO bump map have a first pitch. In an embodiment, the electronic package further comprises a second die over the package substrate. In an embodiment, the second die comprises a second IO bump map, where bumps of the second IO bump map have a second pitch that is different than the first pitch. In an embodiment, the electronic package further comprises interconnects between the first IO bump map and the second IO bump map.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 23, 2021
    Inventors: Zhiguo QIAN, Gerald PASDAST, Juan ZENG, Peipei WANG, Ahmad SIDDIQUI, Lakshmipriya SESHAN
  • Publication number: 20180198185
    Abstract: A cavity resonator tuning diaphragm comprising a plurality of inner corrugations, the plurality of inner corrugations having a first depth. An outer corrugation located between the plurality of inner corrugations and a perimeter of the diaphragm is also included, the outer corrugation having a second depth greater than the first depth. The addition of the outer deep corrugation provides increased thermal stability and reduced required actuation voltage.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 12, 2018
    Applicant: Purdue Research Foundation
    Inventors: Juan Zeng, Zhengan Yang, Dimitrios Peroulis
  • Patent number: 9956744
    Abstract: A shell, a method of preparing the shell and an electronic product comprising the shell are provided. The shell may comprise: a metal shell body, a plastic part made of a resin, and an oxide layer formed between the metal body and the plastic part, joining the plastic part to the metal shell body, wherein the oxide layer contains corrosion pores having an average diameter of about 200 nm to about 2000 nm in the surface contacting the plastic part, and nanopores having a diameter of about 10 to 100 nm in the surface contacting the metal shell body, and a part of the resin is filled in the corrosion pore and corrosion pore.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: May 1, 2018
    Assignees: Shenzhen BYD Auto R&D Company Limited, BYD Company Limited
    Inventors: Jian Sun, Juan Zeng, Yunxia Zhang, Jun Cheng
  • Patent number: 9917344
    Abstract: A cavity resonator tuning diaphragm comprising a plurality of inner corrugations, the plurality of inner corrugations having a first depth. An outer corrugation located between the plurality of inner corrugations and a perimeter of the diaphragm is also included, the outer corrugation having a second depth greater than the first depth. The addition of the outer deep corrugation provides increased thermal stability and reduced required actuation voltage.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: March 13, 2018
    Assignee: PURDUE RESEARCH FOUNDATION
    Inventors: Juan Zeng, Zhengan Yang, Dimitrios Peroulis
  • Publication number: 20160336922
    Abstract: A cavity resonator tuning diaphragm comprising a plurality of inner corrugations, the plurality of inner corrugations having a first depth. An outer corrugation located between the plurality of inner corrugations and a perimeter of the diaphragm is also included, the outer corrugation having a second depth greater than the first depth. The addition of the outer deep corrugation provides increased thermal stability and reduced required actuation voltage.
    Type: Application
    Filed: April 14, 2016
    Publication date: November 17, 2016
    Applicant: Purdue Research Foundation
    Inventors: Juan Zeng, Zhengan Yang, Dimitrios Peroulis
  • Publication number: 20140363623
    Abstract: A shell, a method of preparing the shell and an electronic product comprising the shell are provided. The shell may comprise: a metal shell body, a plastic part made of a resin, and an oxide layer formed between the metal body and the plastic part, joining the plastic part to the metal shell body, wherein the oxide layer contains corrosion pores having an average diameter of about 200 nm to about 2000 nm in the surface contacting the plastic part, and nanopores having a diameter of about 10 to 100 nm in the surface contacting the metal shell body, and a part of the resin is filled in the corrosion pore and corrosion pore.
    Type: Application
    Filed: August 22, 2014
    Publication date: December 11, 2014
    Inventors: Jian SUN, Juan ZENG, Yunxia ZHANG, Jun CHENG
  • Publication number: 20140363658
    Abstract: An aluminum alloy, an aluminum alloy resin composite, a method of preparing aluminum alloy, and a method of preparing aluminum alloy-resin composite are provided. The aluminum alloy may comprise: an aluminum alloy substrate; and an oxide layer formed on the surface of the aluminum alloy substrate. The oxide layer comprises an outer surface and an inner surface. The outer surface contains corrosion pores having an average diameter of about 200 nm to about 2000 nm; and the inner surface contains nanopores having an average diameter of about 10 nm to about 100 nm.
    Type: Application
    Filed: August 22, 2014
    Publication date: December 11, 2014
    Inventors: Jian SUN, Juan ZENG, Jun CHENG