Abstract: Outgassing from a dielectric gap fill layer, e.g., a low dielectric constant material such as HSQ, and attendant deformation or delamination of a barrier dielectric layer on an overlying patterned conductive layer during subsequent thermal processing are avoided or significantly reduced by controlling the thickness of the dielectric cap layer on the dielectric gap fill layer. Embodiments include depositing a conformal SiON barrier on a first conductive pattern, depositing a HSQ gap fill layer on the conformal SiON barrier layer, depositing a silicon oxide cap layer and planarizing such that the thickness of the planarized silicon cap layer is at least 2500 .ANG., thereby avoiding deformation and/or delamination of a conformal SiON barrier layer on an overlying patterned conductive layer during subsequent thermal processing.

Abstract: A method (200) of making a flash memory device without poly stringers includes forming a stacked gate region (202) on a substrate (102) and forming one or more word lines (122a, 122b, 204) in the stacked gate region. The method further includes performing a self-aligned etch (206) in regions adjacent to the one or more word lines (122a, 122b) and subsequently performing an isotropic etch (208) to remove any poly stringers (128) in the regions adjacent the one or more word lines (122a, 122b).