Patents by Inventor Judith Specht

Judith Specht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor die, semiconductor device and IGBT module
    Patent number: 11257914
    Abstract: A semiconductor die includes a semiconductor body having first and second active portions. The first active portion includes first source regions. The second active portion includes second source regions. A gate structure extends from a first surface into the semiconductor body and has a longitudinal gate extension along a lateral first direction. A first load pad and the first source regions are electrically connected. A second load pad and the second source regions are electrically connected. A gap laterally separates the first and second load pads. A lateral longitudinal extension of the gap is parallel to the first direction or deviates therefrom by not more than 60 degree. A connection structure electrically connects the first and second load pads. The connection structure is formed in a groove extending from the first surface into the semiconductor body and/or in a wiring layer formed on the first surface.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: February 22, 2022
    Assignee: Infineon Technologies AG
    Inventors: Vera Van Treek, Roman Baburske, Christian Jaeger, Christian Robert Mueller, Franz-Josef Niedernostheide, Frank Dieter Pfirsch, Alexander Philippou, Judith Specht
  • Semiconductor Die, Semiconductor Device and IGBT Module
    Publication number: 20210119003
    Abstract: A semiconductor die includes a semiconductor body having first and second active portions. The first active portion includes first source regions. The second active portion includes second source regions. A gate structure extends from a first surface into the semiconductor body and has a longitudinal gate extension along a lateral first direction. A first load pad and the first source regions are electrically connected. A second load pad and the second source regions are electrically connected. A gap laterally separates the first and second load pads. A lateral longitudinal extension of the gap is parallel to the first direction or deviates therefrom by not more than 60 degree. A connection structure electrically connects the first and second load pads. The connection structure is formed in a groove extending from the first surface into the semiconductor body and/or in a wiring layer formed on the first surface.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 22, 2021
    Inventors: Vera Van Treek, Roman Baburske, Christian Jaeger, Christian Robert Mueller, Franz-Josef Niedernostheide, Frank Dieter Pfirsch, Alexander Philippou, Judith Specht