Patents by Inventor Judy Huang

Judy Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230149084
    Abstract: A computer-implemented method includes: receiving, by an augmented reality device, a medical image of a surgical site, generating, by the augmented reality device, a virtual surgical site model based on the medical image; presenting, by the augmented reality device, the virtual surgical site model; receiving, by the augmented reality device, user calibration input; aligning, by the ugmented reality device, the virtual surgical site model with a real-life surgical site based on the user calibration input; and displaying, by the augmented reality device and after the aligning, a virtual insertion path between an incision point and a target point to aid in inserting a tool as part of performing a surgical procedure.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 18, 2023
    Applicant: THE JOHNS HOPKINS UNIVERSITY
    Inventors: Ehsan AZIMI, Peter KAZANZIDES, Judy HUANG, Camilo MOLINA
  • Patent number: 9034143
    Abstract: A plasma processing chamber having capacitive and inductive coupling of RF power. An RF power source is connected to an inductive coil and to a top electrode via a variable capacitor to control the ratio of power applied to the coil and electrode. The bottom electrode, which is part of the chuck holding the substrates, is floating, but has parasitive capacitance coupling to ground. No RF bias is applied to the chuck and/or the substrate, but the substrate is chucked using DC power. In a system utilizing the chamber, the chuck is movable and is loaded with substrates outside the chamber, enter the chamber from one side for processing, exit the chamber from an opposite side after the processing, and is unloaded in an unloading chamber. The chuck is then transported back to the loading chamber. Substrates are delivered to and removed from the system using conveyor belts.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: May 19, 2015
    Assignee: INTEVAC, INC.
    Inventors: Young Kyu Cho, Kenneth Tan, Karthik Janakiraman, Judy Huang
  • Patent number: 8677929
    Abstract: Disclosed are methods and apparatus for masking of substrates for deposition, and subsequent lifting of the mask with deposited material. Masking materials are utilized that can be used in high temperatures and vacuum environment. The masking material has minimal outgassing once inside a vacuum chamber and withstand the temperatures during deposition process. The mask is inkjeted over the wafers and, after deposition, removed using agitation, such as ultrasonic agitation, or using laser burn off.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: March 25, 2014
    Assignee: Intevac, Inc.
    Inventors: Alexander J. Berger, Terry Bluck, Vinay Shah, Judy Huang, Karthik Janakiraman, Chau T. Nguyen, Greg Stumbo
  • Publication number: 20120295394
    Abstract: A method for forming holes in the backside dielectric layer of solar cells for fabrication of rear point contact. The backside dielectric layer is coated with a layer of carbon. A shadow mask is placed over the carbon layer and reactive ion etch (RIE) is used to transfer the holes in the shadow mask to the carbon layer, to thereby form a carbon mask. The shadow mask is then removed and RIE is used to transfer the holes from the carbon mask to the dielectric layer. The carbon mask is then removed by, e.g., ashing.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Inventors: Young Kyu Cho, Judy Huang
  • Publication number: 20120171807
    Abstract: Disclosed are methods and apparatus for masking of substrates for deposition, and subsequent lifting of the mask with deposited material. Masking materials are utilized that can be used in high temperatures and vacuum environment. The masking material has minimal outgassing once inside a vacuum chamber and withstand the temperatures during deposition process. The mask is inkjeted over the wafers and, after deposition, removed using agitation, such as ultrasonic agitation, or using laser burn off.
    Type: Application
    Filed: December 27, 2011
    Publication date: July 5, 2012
    Inventors: Alexander J. BERGER, Terry BLUCK, Vinay SHAH, Judy HUANG, Karthik JANAKIRAMAN, Chau T. NGUYEN, Greg STUMBO
  • Publication number: 20090159104
    Abstract: A substrate processing chamber for processing substrates such as semiconductor wafers, flat panel substrate, solar panels, etc., includes mechanism for in-situ plasma clean. The chamber body has at least one plasma source opening provided on its sidewall. A movable substrate holder is situated within the chamber body, the substrate holder assumes a first position wherein the substrate is positioned below the plasma source opening for in-situ plasma cleaning of the chamber, and a second position wherein the substrate is positioned above the plasma source opening for substrate processing. A plasma energy source is coupled to the plasma source opening.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Inventors: Judy Huang, Michael S. Barnes, Terry Bluck
  • Patent number: 7144606
    Abstract: The present invention generally provides improved adhesion and oxidation resistance of carbon-containing layers without the need for an additional deposited layer. In one aspect, the invention treats an exposed surface of carbon-containing material, such as silicon carbide, with an inert gas plasma, such as a helium (He), argon (Ar), or other inert gas plasma, or an oxygen-containing plasma such as a nitrous oxide (N2O) plasma. Other carbon-containing materials can include organic polymeric materials, amorphous carbon, amorphous fluorocarbon, carbon containing oxides, and other carbon-containing materials. The plasma treatment is preferably performed in situ following the deposition of the layer to be treated. Preferably, the processing chamber in which in situ deposition and plasma treatment occurs is configured to deliver the same or similar precursors for the carbon-containing layer(s). However, the layer(s) can be deposited with different precursors.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: December 5, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Judy Huang
  • Publication number: 20060089007
    Abstract: The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications and provides a dielectric layer deposited in situ with the SiC material for the barrier layers, and etch stops, and ARCs. The dielectric layer can be deposited with different precursors as the SiC material, but preferably with the same or similar precursors as the SiC material. The present invention is particularly useful for ICs using high diffusion copper as a conductive material. The invention may also utilize a plasma containing a reducing agent, such as ammonia, to reduce any oxides that may occur, particularly on metal surfaces such as copper filled features.
    Type: Application
    Filed: December 12, 2005
    Publication date: April 27, 2006
    Inventor: Judy Huang
  • Publication number: 20050263900
    Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.
    Type: Application
    Filed: June 29, 2005
    Publication date: December 1, 2005
    Inventors: Judy Huang, Christopher Bencher, Sudha Rathi, Christopher Ngai, Bok Kim
  • Patent number: 6951826
    Abstract: The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. Under certain process parameters, a fixed thickness of the silicon carbide may be used on a variety of thicknesses of underlying layers. The thickness of the silicon carbide ARC is substantially independent of the thickness of the underlying layer for a given reflectivity, in contrast to the typical need for adjustments in the ARC thickness for each underlying layer thickness to obtain a given reflectivity. Another aspect of the invention includes a substrate having a silicon carbide anti-reflective coating, comprising a dielectric layer deposited on the substrate and a silicon carbide anti-reflective coating having a dielectric constant of less than about 7.0 and preferably about 6.0 or less.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: October 4, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Christopher Bencher, Joe Feng, Mei-Yee Shek, Chris Ngai, Judy Huang
  • Publication number: 20050181623
    Abstract: The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. Under certain process parameters, a fixed thickness of the silicon carbide may be used on a variety of thicknesses of underlying layers. The thickness of the silicon carbide ARC is substantially independent of the thickness of the underlying layer for a given reflectivity, in contrast to the typical need for adjustments in the ARC thickness for each underlying layer thickness to obtain a given reflectivity. Another aspect of the invention includes a substrate having a silicon carbide anti-reflective coating, comprising a dielectric layer deposited on the substrate and a silicon carbide anti-reflective coating having a dielectric constant of less than about 7.0 and preferably about 6.0 or less.
    Type: Application
    Filed: October 9, 2003
    Publication date: August 18, 2005
    Inventors: Christopher Bencher, Joe Feng, Mei-Yee Shek, Chris Ngai, Judy Huang
  • Publication number: 20050101154
    Abstract: The present invention generally provides improved adhesion and oxidation resistance of carbon-containing layers without the need for an additional deposited layer. In one aspect, the invention treats an exposed surface of carbon-containing material, such as silicon carbide, with an inert gas plasma, such as a helium (He),. argon (Ar), or other inert gas plasma, or an oxygen-containing plasma such as a nitrous oxide (N2O) plasma. Other carbon-containing materials can include organic polymeric materials, amorphous carbon, amorphous fluorocarbon, carbon containing oxides, and other carbon-containing materials. The plasma treatment is preferably performed in situ following the deposition of the layer to be treated. Preferably, the processing chamber in which in situ deposition and plasma treatment occurs is configured to deliver the same or similar precursors for the carbon-containing layer(s). However, the layer(s) can be deposited with different precursors.
    Type: Application
    Filed: November 22, 2004
    Publication date: May 12, 2005
    Inventor: Judy Huang
  • Publication number: 20050023694
    Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.
    Type: Application
    Filed: August 24, 2004
    Publication date: February 3, 2005
    Inventors: Claes Bjorkman, Melissa Yu, Hongqing Shan, David Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Chapra, Gerald Yin, Farhad Moghadam, Judy Huang, Dennis Yost, Betty Tang, Yunsang Kim
  • Patent number: 6827982
    Abstract: The adhesion of overlying layers to a silicalite-plus-binder dielectric layer is enhanced by forming a layer that includes the binder in a higher concentration. The overlying layer, e.g., silicon dioxide, silicon carbide or silicon nitride, adheres more tightly to the higher-concentration binder layer. Although the presence of the higher-concentration binder layer may increase the dielectric constant of the overall silicalite-plus-binder stack, the increase is generally minimal.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: December 7, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Judy Huang, Justin F. Gaynor, Archita Sengupta
  • Patent number: 6821571
    Abstract: The present invention generally provides improved adhesion and oxidation resistance of carbon-containing layers without the need for an additional deposited layer. In one aspect, the invention treats an exposed surface of carbon-containing material, such as silicon carbide, with an inert gas plasma, such as a helium (He), argon (Ar), or other inert gas plasma, or an oxygen-containing plasma such as a nitrous oxide (N2O) plasma. Other carbon-containing materials can include organic polymeric materials, amorphous carbon, amorphous fluorocarbon, carbon containing oxides, and other carbon-containing materials. The plasma treatment is preferably performed in situ following the deposition of the layer to be treated. Preferably, the processing chamber in which in situ deposition and plasma treatment occurs is configured to deliver the same or similar precursors for the carbon-containing layer(s). However, the layer(s) can be deposited with different precursors.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: November 23, 2004
    Assignee: Applied Materials Inc.
    Inventor: Judy Huang
  • Patent number: 6734102
    Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: May 11, 2004
    Assignee: Applied Materials Inc.
    Inventors: Sudha Rathi, Ping Xu, Judy Huang
  • Patent number: 6635583
    Abstract: The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. The same material may also be used as a barrier layer and an etch stop, even in complex damascene structures and with high diffusion conductors such as copper as a conductive material. Under certain process parameters, a fixed thickness of the silicon carbide may be used on a variety of thicknesses of underlying layers. The thickness of the silicon carbide ARC is substantially independent of the thickness of the underlying layer for a given reflectivity, in contrast to the typical need for adjustments in the ARC thickness for each underlying layer thickness to obtain a given reflectivity.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: October 21, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Christopher Bencher, Joe Feng, Mei-Yee Shek, Chris Ngai, Judy Huang
  • Publication number: 20030089992
    Abstract: The present invention generally provides an improved process for depositing silicon carbide, using a silane-based material with certain process parameters, onto an electronic device, such as a semiconductor, that is useful for forming a suitable barrier layer, an etch stop, and a passivation layer for IC applications. As a barrier layer, in the preferred embodiment, the particular silicon carbide material is used to reduce the diffusion of copper and may also used to minimize the contribution of the barrier layer to the capacitive coupling between interconnect lines. It may also be used as an etch stop, for instance, below an intermetal dielectric (IMD) and especially if the IMD is a low k, silane-based IMD. In another embodiment, it may be used to provide a passivation layer, resistant to moisture and other adverse ambient conditions. Each of these aspects may be used in a dual damascene structure.
    Type: Application
    Filed: October 1, 1998
    Publication date: May 15, 2003
    Inventors: SUDHA RATHI, PING XU, CHRISTOPHER BENCHER, JUDY HUANG, KEGANG HUANG, CHRIS NGAI
  • Patent number: 6541369
    Abstract: A method and apparatus for reducing trapped charges in a semiconductor device having a first layer and a second layer, said method comprising the steps of providing said first layer, flowing a deposition, a dilution and a conversion gas upon said first layer thereby forming a transition layer, phasing out said flow of conversion gas and forming said second layer upon said transition layer. The deposition gas, dilution gas and conversion gas are preferably trimethylsilane, helium and N2O respectively. The method is performed via chemical vapor deposition or plasma enhanced chemical vapor deposition. The apparatus has a first insulating layer, a transition layer disposed upon said first layer and a second insulating layer disposed upon said transition layer. The transition layer improves the adhesion between said first insulating layer and said second insulating layer. A reduction in the amount of electrical charges (i.e.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: April 1, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Judy Huang, Chris Bencher, Sudha Rathi
  • Patent number: 6533855
    Abstract: The present invention relates to chemical modifications of the surfaces of silicalite and high-silica zeolite nanoparticles permitting such particles to be dispersed in nonpolar hydrophobic solvents, and to the dispersions so produced and to interlayer dielectric layers, molecular sieve membranes and/or catalytic membranes formed from such dispersions, and to the fabrication of integrated circuits in the case of interlayer dielectric layers. A dispersion of silicalite or high-silica zeolite nanoparticles is formed in alkaline aqueous solution. The pH of the solution is reduced by multiple rinsing with deionized water to approximately pH of 9 or 10. The solution is then rendered acidic, typically pH between 2 and 3, by the addition of a suitable acid. The acidic solution is gradually intermixed with an alcohol under conditions of elevated temperature and/or reduced pressure to enhance the solvent evaporation rate.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: March 18, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Justin F. Gaynor, Judy Huang