Patents by Inventor Juergen Holzmueller

Juergen Holzmueller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9799521
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. The first doping regions of the plurality of first doping regions of the first doping structure include dopants of a first conductivity type with different doping concentrations. Further, the second doping regions of the plurality of second doping regions of the first doping structure include dopants of a second conductivity type with different doping concentrations. At least one first doping region of the plurality of first doping regions of the first doping structure partly overlaps at least one second doping region of the plurality of second doping regions of the first doping structure causing an overlap region arranged at the main surface.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: October 24, 2017
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Thomas Schweinboeck, Jesper Wittborn, Erwin Bacher, Juergen Holzmueller, Hans-Joachim Schulze
  • Publication number: 20160189964
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. The first doping regions of the plurality of first doping regions of the first doping structure include dopants of a first conductivity type with different doping concentrations. Further, the second doping regions of the plurality of second doping regions of the first doping structure include dopants of a second conductivity type with different doping concentrations. At least one first doping region of the plurality of first doping regions of the first doping structure partly overlaps at least one second doping region of the plurality of second doping regions of the first doping structure causing an overlap region arranged at the main surface.
    Type: Application
    Filed: March 3, 2016
    Publication date: June 30, 2016
    Inventors: Markus Zundel, Thomas Schweinboeck, Jesper Wittborn, Erwin Bacher, Juergen Holzmueller, Hans-Joachim Schulze
  • Patent number: 9306011
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. The first doping regions of the plurality of first doping regions of the first doping structure include dopants of a first conductivity type with different doping concentrations. Further, the second doping regions of the plurality of second doping regions of the first doping structure include dopants of a second conductivity type with different doping concentrations. At least one first doping region of the plurality of first doping regions of the first doping structure partly overlaps at least one second doping region of the plurality of second doping regions of the first doping structure causing an overlap region arranged at the main surface.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: April 5, 2016
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Thomas Schweinboeck, Jesper Wittborn, Erwin Bacher, Juergen Holzmueller, Hans-Joachim Schulze
  • Patent number: 9218960
    Abstract: A method of manufacturing a semiconductor device includes providing a layered structure having a hard dielectric layer containing a first dielectric material having a Young's modulus greater than 10 GPa in a central portion of a main surface of a main body comprising a single crystalline semiconductor body, and providing a dielectric stress relief layer containing a second dielectric material having a lower Young's modulus than the first dielectric material, the stress relief layer covering the layered structure and extending beyond an outer edge of the layered structure.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 22, 2015
    Assignee: Infineon Technologies AG
    Inventors: Peter Nelle, Uwe Schmalzbauer, Juergen Holzmueller, Markus Zundel
  • Publication number: 20150097184
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. The first doping regions of the plurality of first doping regions of the first doping structure include dopants of a first conductivity type with different doping concentrations. Further, the second doping regions of the plurality of second doping regions of the first doping structure include dopants of a second conductivity type with different doping concentrations. At least one first doping region of the plurality of first doping regions of the first doping structure partly overlaps at least one second doping region of the plurality of second doping regions of the first doping structure causing an overlap region arranged at the main surface.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 9, 2015
    Inventors: Markus Zundel, Thomas Schweinboeck, Jesper Wittborn, Erwin Bacher, Juergen Holzmueller, Hans-Joachim Schulze
  • Publication number: 20140315391
    Abstract: A method of manufacturing a semiconductor device includes providing a layered structure having a hard dielectric layer containing a first dielectric material having a Young's modulus greater than 10 GPa in a central portion of a main surface of a main body comprising a single crystalline semiconductor body, and providing a dielectric stress relief layer containing a second dielectric material having a lower Young's modulus than the first dielectric material, the stress relief layer covering the layered structure and extending beyond an outer edge of the layered structure.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Peter Nelle, Uwe Schmalzbauer, Juergen Holzmueller, Markus Zundel
  • Patent number: 8803297
    Abstract: A semiconductor device includes a main body having a single crystalline semiconductor body. A layered structure directly adjoins a central portion of a main surface of the main body and includes a hard dielectric layer provided from a first dielectric material with Young's modulus greater than 10 GPa. A stress relief layer directly adjoins the layered structure opposite to the main body and extends beyond an outer edge of the layered structure. Providing the layered structure at a distance to the edge of the main body and covering the outer surface of the layered structures with the stress relief layer enhances device reliability.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: August 12, 2014
    Assignee: Infineon Technologies AG
    Inventors: Peter Nelle, Uwe Schmalzbauer, Juergen Holzmueller, Markus Zundel
  • Publication number: 20140042597
    Abstract: A semiconductor device includes a main body having a single crystalline semiconductor body. A layered structure directly adjoins a central portion of a main surface of the main body and includes a hard dielectric layer provided from a first dielectric material with Young's modulus greater than 10 GPa. A stress relief layer directly adjoins the layered structure opposite to the main body and extends beyond an outer edge of the layered structure. Providing the layered structure at a distance to the edge of the main body and covering the outer surface of the layered structures with the stress relief layer enhances device reliability.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 13, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Peter Nelle, Uwe Schmalzbauer, Juergen Holzmueller, Markus Zundel