Patents by Inventor Juergen Scheible

Juergen Scheible has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for arranging printed conductors on the surface of a semiconductor component
    Patent number: 5888893
    Abstract: In a process for arranging printed conductors on the surface of a semiconductor component, distances from the first forbidden zones are maintained. This is accomplished by converting the first forbidden zones to second forbidden zones by enlargement, where the zones are enlarged in the x and y directions by a different factor than in the a and b directions. Then paths are produced outside of or at the edge of the second forbidden zones for the arrangement of printed conductors.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: March 30, 1999
    Assignee: Robert Bosch GmbH
    Inventors: Carsten Roedel, Juergen Scheible
  • Process for arranging printed conductors on the surface of semiconductor components
    Patent number: 5736426
    Abstract: In a process for arranging printed conductors on the surface of a semiconductor component, printed conductors connect wire ranges that are designed as polygons. The polygons are composed of individual edge points. With regard to each of these edge points, it is determined whether it can be connected by a printed conductor running parallel to the coordinate system or diagonally to the coordinate system. Additional edge points may also have a "not connectable" status.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: April 7, 1998
    Assignee: Robert Bosch GmbH
    Inventors: Carsten Roedel, Juergen Scheible