Patents by Inventor Juergen Schredl

Juergen Schredl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090001535
    Abstract: Semiconductor module for a Switched-Mode Power Supply comprises at least one semiconductor power switch, a control semiconductor chip and a leadframe comprising a die pad and a plurality of leads disposed on one side of the die pad. The die pad comprises at least two mechanically isolated regions wherein the semiconductor power switch is mounted on a first region of the die pad and the control semiconductor chip is mounted on a second region of the die pad. Plastic housing material electrically isolates the first region and the second region of the die pad and electrically isolates the semiconductor power switch from the control semiconductor chip.
    Type: Application
    Filed: July 28, 2005
    Publication date: January 1, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yang Hong Heng, Kean Cheong Lee, Xaver Schloegel, Gerhard Deml, Ralf Otremba, Juergen Schredl
  • Publication number: 20080061413
    Abstract: A semiconductor component has a leadframe, a semiconductor die and an encapsulation element. The leadframe has a die pad having a first side, at least one lead spaced at a distance from the die pad and at least one support bar remnant protruding from the die pad, each having a distal end. The encapsulation element has plastic and encapsulates at least the semiconductor die and a portion of the first side of the die pad. At least one support bar remnant is positioned within the encapsulation element and the distal end of the support bar remnant is encapsulated by at least one dielectric compound.
    Type: Application
    Filed: September 7, 2006
    Publication date: March 13, 2008
    Inventors: Ralf Otremba, Xaver Schloegel, Juergen Schredl
  • Patent number: 6328200
    Abstract: Process for the selective formation of contact metallisations on terminal areas of a substrate, wherein the surface of the substrate is covered with a template in such a way that template openings forming deposit spaces are arranged above the terminal areas, and wherein the deposit spaces are filled with a solder material, and fusing of the solder material is effected with a view to forming the contact metallisations in the deposit spaces which are non-wettable at least in regions of contact with the solder material.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: December 11, 2001
    Assignee: PAC Tech - Packaging Technologies GmbH
    Inventors: Jürgen Schredl, Paul Kasulke