Abstract: According to some embodiments of the present invention provides a new and unique technique to extend a point-to-point communication with a point-to-multipoint feature. Each end node has, beside a unique address, a configurable address that can be updated via some configuration means from a control entity. The unique address is a dedicated address. Different end node can have the same configurable address. The sender of a message or packet must be aware of the used addresses in the system. The technique does not require any changes to the normal data communication protocol. The messages or packets are unchanged. The implementation is done on the sender side and in the end node. Each message or frame or packet contains only one address. Each message and packet is received by each end node. A message is used by an end node if the unique or configurable address is matching.

Abstract: Image or other data is stored in a memory. A first validation parameter (e.g., a checksum) is determined for the data stored in the memory at a first time, and stored. A second validation parameter is determined for the data stored in the memory at a second time, and also stored. The stored first and second validation parameters are then compared. In this manner, corruption of data in the memory may be determined by the comparison. In the case where the compared first and second validation parameters are not identical (within a threshold in certain embodiments), the data stored in the memory is updated. As applied to graphical image data, this is seen as advantageous over the prior art approach of periodically updating a frame memory even when no new image data set is present. Apparatus and computer program products are also detailed.

Abstract: The present invention provides methods and modules allowing for mapping of interface signals at for instance multi-line buses. A mapping of internal signal order schemes to external signal order schemes is enabled such that upon configuration any interface signals may carried on any lines of a multi-line bus. The configurability may obtained by the implementation of mapping logics and mapping algorithms, which associates external interface terminal to signal association to internal interface terminal to signal association in a configurable manner.

Abstract: An apparatus comprises at least one component arranged to be supplied with at least one analog value. In order to enable a testing of the at least one component, the apparatus further comprises at least one comparator configured to compare at least one analog value, which corresponds to at least one analog value supplied to the at least one component, with at least one analog value read from the at least one component. The comparator is moreover configured to provide a result of the comparison.