Patents by Inventor Juhee Mala

Juhee Mala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260003962
    Abstract: An apparatus and method are disclosed for a System on Chip (SoC) which includes a central interconnect fabric connected between a plurality of initiators and targets, where the central interconnect includes one or more debug trace probes for connection to a debugger, where each debug trace probe is connected with debug firewall control logic configured to allow a data trace packet from a first cohort to be traced out to the debug trace probe only if the data trace packet includes a CID value associated with the first cohort that matches a CCID value associated with a configuring cohort which configures the debug trace probe, and where the debug firewall control logic includes a secure trace enable multiplexer connected to packet capture control logic which is configured to output a packet capture enable signal indicating whether the data trace packet is a secure packet or unsecure packet.
    Type: Application
    Filed: June 3, 2025
    Publication date: January 1, 2026
    Inventors: Ayushi Agarwal, Aditya Vikram Chopra, Juhee Mala
  • Patent number: 11475545
    Abstract: An image processing circuit for correcting a distorted image includes an internal memory and a correction circuit. The internal memory of the image processing circuit is configured to store a radial look-up table (LUT), a set of tangential LUTs, and co-ordinates of a correction center of the distorted image. The radial LUT and the set of tangential LUTs include first and second sets of parameters to correct radial and tangential distortion of the distorted image, respectively. The correction circuit is configured to reconstruct portions of the correction LUT on-the-fly based on the radial LUT, the set of tangential LUTs, and the co-ordinates of the correction center, and correct portions of the distorted image based on the reconstructed portions of correction LUT to generate the portions of the corrected image.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 18, 2022
    Assignee: NXP USA, Inc.
    Inventors: Ankur Bindal, Sharath Subramanya Naidu, Juhee Mala
  • Publication number: 20210374919
    Abstract: An image processing circuit for correcting a distorted image includes an internal memory and a correction circuit. The internal memory of the image processing circuit is configured to store a radial look-up table (LUT), a set of tangential LUTs, and co-ordinates of a correction center of the distorted image. The radial LUT and the set of tangential LUTs include first and second sets of parameters to correct radial and tangential distortion of the distorted image, respectively. The correction circuit is configured to reconstruct portions of the correction LUT on-the-fly based on the radial LUT, the set of tangential LUTs, and the co-ordinates of the correction center, and correct portions of the distorted image based on the reconstructed portions of correction LUT to generate the portions of the corrected image.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Inventors: Ankur Bindal, Sharath Subramanya Naidu, Juhee Mala
  • Patent number: 7418031
    Abstract: The present invention provides an electronic device consisting of a Universal Asynchronous Receiver Transmitter (UART) having its transmit data output connected to a triggered timer and a computing means that computes the transmitted baud rate from the time measured by the timer for transmitting the known data byte.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: August 26, 2008
    Assignee: STMicroelectronics PVT. Ltd.
    Inventors: Mithilesh Kumar Jha, Juhee Mala
  • Publication number: 20050041594
    Abstract: The present invention provides an electronic device consisting of a Universal Asynchronous Receiver Transmitter (UART) having its transmit data output connected to a triggered timer and a computing means that computes the transmitted baud rate from the time measured by the timer for transmitting the known data byte.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 24, 2005
    Inventors: Mithilesh Jha, Juhee Mala