Patents by Inventor Ju Heyuck Baeck

Ju Heyuck Baeck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11777039
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: October 3, 2023
    Assignee: LG Display Co., Ltd.
    Inventor: Ju-Heyuck Baeck
  • Publication number: 20220223738
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Application
    Filed: April 1, 2022
    Publication date: July 14, 2022
    Inventor: Ju-Heyuck BAECK
  • Patent number: 11322621
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: May 3, 2022
    Assignee: LG Display Co., Ltd.
    Inventor: Ju-Heyuck Baeck
  • Publication number: 20200335629
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Application
    Filed: July 6, 2020
    Publication date: October 22, 2020
    Inventor: Ju-Heyuck BAECK
  • Patent number: 10741693
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: August 11, 2020
    Assignee: LG Display Co., Ltd.
    Inventor: Ju-Heyuck Baeck
  • Publication number: 20170194502
    Abstract: A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 6, 2017
    Inventor: Ju-Heyuck BAECK
  • Patent number: 9070478
    Abstract: A variable resistive memory device includes an array of a plurality of memory cells. Each of the plurality of memory cells includes first and second electrodes, and an SbmSen material layer (where m and n are positive numbers, respectively) interposed between the first electrode and the second electrode. The SbmSen material layer includes a separation structure in which a plurality of Sb atoms are in contact with a plurality of Se atoms.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: June 30, 2015
    Assignees: Hynix Semiconductor Inc., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Mann Ho Cho, Ju Heyuck Baeck, Tae Hyeon Kim, Hye Jin Choi
  • Publication number: 20130141967
    Abstract: A variable resistive memory device includes an array of a plurality of memory cells. Each of the plurality of memory cells includes first and second electrodes, and an SbmSen material layer (where m and n are positive numbers, respectively) interposed between the first electrode and the second electrode. The SbmSen material layer includes a separation structure in which a plurality of Sb atoms are in contact with a plurality of Se atoms.
    Type: Application
    Filed: May 30, 2012
    Publication date: June 6, 2013
    Inventors: Mann Ho CHO, Ju Heyuck Baeck, Tae Hyeon Kim, Hye Jin Choi