Abstract: Some embodiments relate to an integrated chip that includes a first source/drain region and a second source/drain region disposed in a substrate. A plane that is substantially perpendicular to an upper surface of the substrate traverses the first source/drain region and the second source/drain region. Agate electrode extends over a channel region in the substrate between the first source/drain region and the second source/drain region. The gate electrode is separated from the channel region by way of a charge trapping dielectric structure. The charge trapping dielectric structure includes a tunnel dielectric layer, a charge trapping dielectric layer over the tunnel dielectric layer, and a blocking dielectric layer over the charge trapping dielectric layer. The channel region has a channel width measured perpendicularly to the plane, and the tunnel dielectric layer has different thicknesses at different respective points along the channel width.

Abstract: A feedback control circuit of a pulse-frequency modulation (PFM) converter includes an on-time timer circuit and a detection circuit. The on-time timer circuit generates an on-time control signal for controlling an on-time duration of a switch circuit included in a power stage circuit of the PFM converter. The detection circuit controls the on-time timer circuit to adaptively adjust the on-time control signal according to a pulse interval between two successive inductor current pulses of the PEM converter.

Abstract: A system and method for generating a control bifurcation signal in accordance with the Open Compute Project (OCP) Specification. An OCP device is provided that has a bifurcation function with an input to activate a bus bifurcation function. An input/output control circuit having an output coupled to a bifurcation control line coupled to the OCP device is provided. The input/output control circuit is operable to provide a bifurcation control signal to the OCP device over the bifurcation control line during an auxiliary power phase transition period of powering-on the OCP device.

Abstract: A signal generation and transmission system includes a modulator and an RF transceiver. The RF transceiver includes a voltage-controlled oscillator, a power divider, a low-pass filter, a low-noise amplifier and a mixer. The voltage-controlled oscillator receives a signal from the modulator and produces a frequency modulated continuous wave signal. The power divider receives the frequency modulated continuous wave signal from the voltage-controlled oscillator. The low-pass filter receives the frequency modulated continuous wave signal from the power divider. The low-noise amplifier receives, amplifies and transfers a target echo signal. The mixer combines the frequency modulated continuous wave signal from the power divider with the echo signal of target from the low-noise amplifier so that the two signals are added up or subtracted from each other in a frequency band.

Abstract: A computer-assisted schematic linking method for electronic components includes naming the circuits of various electronic components according to signal line naming conventions; storing in an electronic component specification data base; selecting a plurality of first electronic components from the electronic component data base to generate a first electronic component list for users to select the first electronic components; searching second electronic components from the electronic component data base corresponding to the selected first electronic components and generating a second electronic component list for users to select the second electronic components; processing schematic linking operation for the first electronic components and the second electronic components; and repeating the foregoing steps to select other electronic components until a complete schematic chart is finished.

Abstract: A computer-assisted schematic linking method for electronic components includes naming the circuits of various electronic components according to signal line naming conventions; storing in an electronic component specification data base; selecting a plurality of first electronic components from the electronic component data base to generate a first electronic component list for users to select the first electronic components; searching second electronic components from the electronic component data base corresponding to the selected first electronic components and generating a second electronic component list for users to select the second electronic components; processing schematic linking operation for the first electronic components and the second electronic components; and repeating the foregoing steps to select other electronic components until a complete schematic chart is finished.

Abstract: A method and a system for processing engineer-designed data are provided. A data receiving/transmitting module receives engineer-designed data from an engineer design department upon receiving a data receiving request from a user through a network terminal device via a network communication system. Then, a data comparison module compares the received engineer-designed data with associated engineer-designed data stored in a database to obtain consistent engineer-designed data. A file producing module transforms the consistent engineer-designed data into a document file in a specific format. The data receiving/transmitting module transmits the transformed document file to an engineer unit corresponding to an engineering stage where the document file is formed. Finally, a data storage module stores the document file confirmed by the engineer unit in the database.