Abstract: A pixel substrate and a fabrication method thereof are provided. The method includes: forming a gate and a lower pad on a substrate; forming a gate insulating layer overlaying the gate and the lower pad; forming a channel layer and a first electrode layer on the gate insulating layer, in which the projection areas of the channel layer and the gate on the substrate are overlapped; forming an etching-barrier material layer on the substrate and simultaneously forming a contact opening at the gate insulating layer to expose the lower pad; forming a source, a drain and an upper pad on the substrate; forming a protective layer; forming a second electrode layer with multiple slits on the protective layer, in which one of the first and second electrode layers is electrically connected to the drain. The invention can simplify the process steps and reduce fabrication time.

Abstract: A pixel structure of a liquid crystal display panel includes a first substrate; a color filter layer formed on the first substrate, the color filter layer comprising a plurality of filtering areas for filtering light, and a plurality of blocking areas for blocking light; a main spacer formed on one of the blocking areas; a sub spacer formed on another one of the blocking areas; a second substrate; a thin film transistor formed on the second substrate; an insulating layer formed above the thin film transistor and the second substrate; a liquid crystal layer formed between the first substrate and the second substrate; wherein a distance from an upper surface of the insulating layer near the main spacer to the second substrate is greater than a distance from an upper surface of the insulating layer near the sub spacer to the second substrate.

Abstract: A pixel substrate and a fabrication method thereof are provided. The method includes: forming a gate and a lower pad on a substrate; forming a gate insulating layer overlaying the gate and the lower pad; forming a channel layer and a first electrode layer on the gate insulating layer, in which the projection areas of the channel layer and the gate on the substrate are overlapped; forming an etching-barrier material layer on the substrate and simultaneously forming a contact opening at the gate insulating layer to expose the lower pad; forming a source, a drain and an upper pad on the substrate; forming a protective layer; forming a second electrode layer with multiple slits on the protective layer, in which one of the first and second electrode layers is electrically connected to the drain. The invention can simplify the process steps and reduce fabrication time.

Abstract: The pixel structure includes a scan line, a data line, a thin-film transistor, a first electrode layer, a protective layer and a second electrode layer. The thin-film transistor is electrically connected to the scan line and the data line, and includes a gate, an oxide semiconductor layer, an insulating layer, a source and a drain. The first electrode layer is in the same layer as the oxide semiconductor layer, and is surrounded by the scan line and the data line. The second electrode layer is located on the first electrode layer, and the protective layer is located between the first electrode layer and the second electrode layer, wherein one of the first and second electrode layers is electrically connected to the thin-film transistor, and the other is connected to a common voltage. The second electrode layer includes a plurality of slits exposing an area of the first electrode layer.

Abstract: There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.

Abstract: The pixel structure includes a scan line, a data line, a thin-film transistor, a first electrode layer, a protective layer and a second electrode layer. The thin-film transistor is electrically connected to the scan line and the data line, and includes a gate, an oxide semiconductor layer, an insulating layer, a source and a drain. The first electrode layer is in the same layer as the oxide semiconductor layer, and is surrounded by the scan line and the data line. The second electrode layer is located on the first electrode layer, and the protective layer is located between the first electrode layer and the second electrode layer, wherein one of the first and second electrode layers is electrically connected to the thin-film transistor, and the other is connected to a common voltage. The second electrode layer includes a plurality of slits exposing an area of the first electrode layer.

Abstract: A transflective type liquid crystal display comprises a first substrate with a reflective region and a transmission region. A gate region, an insulation layer and a semiconductor layer are sequentially formed on the first substrate. The semiconductor layer has a source region, a drain region and a channel region. A first dielectric layer is disposed on the semiconductor layer and has a through hole to expose a part of the drain region. A first common electrode is disposed on the first dielectric layer and the through hole to cover the exposed part of the drain region. A reflective electrode is disposed on the first dielectric layer located in the reflective region. A second dielectric layer is disposed on the first common electrode and the reflective electrode. A pixel electrode is disposed on the second dielectric layer and connected to the drain region via the through hole.

Abstract: The present invention discloses a thin film transistor array substrate comprising a plurality of thin film transistors, with each one thereof including a gate electrode, a gate insulation layer, an amorphous-oxide semiconductor layer and a pair of a source electrode and a drain electrode. The amorphous-oxide semiconductor layer comprises an amorphous-oxide semiconductor material having a-IGZO. The thin film transistor array substrate further comprises a first insulation layer and a second insulation layer disposed on the thin film transistors. Since the a-IGZO semiconductor layer and the thick insulation layer covered thereon are used in the present invention, a common electrode can overlap the scan lines or data lines to increase the aperture ratio of the pixel structure. Furthermore, the thick insulation layer can be fabricated through a coating process, so as to keep the a-IGZO semiconductor layer from damages during the fabrication processes.

Abstract: A vertical thin-film transistor structure includes a substrate, a source electrode, an insulation layer, a drain electrode, two first channel layers, a gate insulation layer and a gate electrode, which are stacked upward in that order on the substrate. The first channel layers are respectively disposed at two opposite ends of the drain electrode, and extend from the upper surface of the drain electrode to the upper surface of the source electrode respectively. Each of the first channel layers contacts the source electrode and the drain electrode. The gate insulation layer is disposed on the source electrode, the first channel layers and the drain electrode. The gate electrode is disposed on the gate insulation layer and covers the first channel layers. Therefore, the volume of the conventional thin-film transistor structure shrinks, and the ratio of the volume of the conventional thin-film transistor structure to that of a pixel structure decreases.

Abstract: A pixel array substrate includes a substrate, a plurality of thin-film transistors disposed on the substrate, a first insulating layer covering the thin-film transistors and the substrate, a common electrode disposed on the first insulating layer, a second insulating layer covering the first insulating layer and the common electrode, and a plurality of pixel electrodes disposed on the second insulating layer. Each thin-film transistor includes a drain electrode. The first insulating layer includes a plurality of first openings exposing the drain electrodes respectively. The second insulating layer includes a plurality of second openings exposing the first openings respectively. Each pixel electrode is electrically connected to each drain electrode respectively through each first opening and each second opening. The first insulating layer includes a thickness between 1 micron and 5 microns.

Abstract: A transflective type liquid crystal display comprises a first substrate with a reflective region and a transmission region. A gate region, an insulation layer and a semiconductor layer are sequentially formed on the first substrate. The semiconductor layer has a source region, a drain region and a channel region. A first dielectric layer is disposed on the semiconductor layer and has a through hole to expose a part of the drain region. A first common electrode is disposed on the first dielectric layer and the through hole to cover the exposed part of the drain region. A reflective electrode is disposed on the first dielectric layer located in the reflective region. A second dielectric layer is disposed on the first common electrode and the reflective electrode. A pixel electrode is disposed on the second dielectric layer and connected to the drain region via the through hole.

Abstract: A pixel structure of a liquid crystal display panel includes a first substrate; a color filter layer formed on the first substrate, the color filter layer comprising a plurality of filtering areas for filtering light, and a plurality of blocking areas for blocking light; a main spacer formed on one of the blocking areas; a sub spacer formed on another one of the blocking areas; a second substrate; a thin film transistor formed on the second substrate; an insulating layer formed above the thin film transistor and the second substrate; a liquid crystal layer formed between the first substrate and the second substrate; wherein a distance from an upper surface of the insulating layer near the main spacer to the second substrate is greater than a distance from an upper surface of the insulating layer near the sub spacer to the second substrate.

Abstract: A vertical thin-film transistor structure includes a substrate, a source electrode, an insulation layer, a drain electrode, two first channel layers, a gate insulation layer and a gate electrode, which are stacked upward in that order on the substrate. The first channel layers are respectively disposed at two opposite ends of the drain electrode, and extend from the upper surface of the drain electrode to the upper surface of the source electrode respectively. Each of the first channel layers contacts the source electrode and the drain electrode. The gate insulation layer is disposed on the source electrode, the first channel layers and the drain electrode. The gate electrode is disposed on the gate insulation layer and covers the first channel layers. Therefore, the volume of the conventional thin-film transistor structure shrinks, and the ratio of the volume of the conventional thin-film transistor structure to that of a pixel structure decreases.

Abstract: There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.

Abstract: There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.