Abstract: A semiconductor device includes a logic circuit region having at least one core device and at least one input/output (I/O) device. The at least one core device has a first accumulative antenna ratio, and the at least one I/O device has a second accumulative antenna ratio. The first accumulative antenna ratio is greater than the second accumulative antenna ratio.

Abstract: A design method of a dummy pattern layout including the following steps is provided. An integrated circuit layout design including resistor elements is obtained via a computer. The locations of dummy conductive structures are configured, wherein the dummy conductive structures are aligned with the resistor elements. The locations of dummy support patterns are configured, wherein each of the dummy support patterns is configured between two adjacent dummy conductive structures, and each of the dummy conductive structures is equidistant from the dummy support patterns on both sides.

Abstract: A design method of a dummy pattern layout including the following steps is provided. An integrated circuit layout design including resistor elements is obtained via a computer. The locations of dummy conductive structures are configured, wherein the dummy conductive structures are aligned with the resistor elements. The locations of dummy support patterns are configured, wherein each of the dummy support patterns is configured between two adjacent dummy conductive structures, and each of the dummy conductive structures is equidistant from the dummy support patterns on both sides.

Abstract: A semiconductor structure including a substrate, dummy conductive structures, and resistor elements is provided. The substrate includes a resistor region and has isolation structures and dummy support patterns located in the resistor region. Each of the isolation structures is located between two adjacent dummy support patterns. Each of the dummy conductive structures is disposed on each of the isolation structures and equidistant from the dummy support patterns on both sides. The resistor elements are disposed above the dummy conductive structures and aligned with the dummy conductive structures.

Abstract: A semiconductor structure including a substrate, dummy conductive structures, and resistor elements is provided. The substrate includes a resistor region and has isolation structures and dummy support patterns located in the resistor region. Each of the isolation structures is located between two adjacent dummy support patterns. Each of the dummy conductive structures is disposed on each of the isolation structures and equidistant from the dummy support patterns on both sides. The resistor elements are disposed above the dummy conductive structures and aligned with the dummy conductive structures.

Abstract: A semiconductor structure includes a substrate comprising a plurality of layers formed thereon, at least a first device formed in one of the layers formed thereon, a drawn region enclosing the first device, and a plurality of dummy structures in another layer. The dummy structures are formed in a first region correspondingly outside of the drawing region and in a second region correspondingly inside of the drawing region.