Patents by Inventor Jui-Fen CHIEN

Jui-Fen CHIEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10707318
    Abstract: Provided is a semiconductor device including a fin-type field effect transistor (FinFET). The first FinFET includes a first gate structure and the first gate structure includes a first work function layer. The first work function layer includes a first layer and a second layer. The first layer is disposed over the second layer. The second layer includes a base material and a dopant doped in the base material. The dopant comprises Al, Ta, W, or a combination thereof. The first layer and the second layer comprise different materials. A method of manufacturing the semiconductor device is also provided.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: July 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Fen Chien, Hsiao-Kuan Wei, Hsien-Ming Lee, Chin-You Hsu
  • Patent number: 10515807
    Abstract: Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Fen Chien, Chih-Hsiang Fan, Hsiao-Kuan Wei, Pohan Kung, Hsien-Ming Lee
  • Publication number: 20190385855
    Abstract: Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 19, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Fen CHIEN, Chih-Hsiang FAN, Hsiao-Kuan WEI, Pohan KUNG, Hsien-Ming LEE
  • Publication number: 20190164751
    Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.
    Type: Application
    Filed: January 25, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chien CHI, Hsiao-Kuan WEI, Hung-Wen SU, Pei-Hsuan LEE, Hsin-Yun HSU, Jui-Fen CHIEN
  • Publication number: 20190164752
    Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.
    Type: Application
    Filed: November 30, 2018
    Publication date: May 30, 2019
    Inventors: Chih-Chien Chi, Pei-Hsuan Lee, Hung-Wen Su, Hsiao-Kuan Wei, Jui-Fen Chien, Hsin-Yun Hsu
  • Publication number: 20190148510
    Abstract: Provided is a semiconductor device including a fin-type field effect transistor (FinFET). The first FinFET includes a first gate structure and the first gate structure includes a first work function layer. The first work function layer includes a first layer and a second layer. The first layer is disposed over the second layer. The second layer includes a base material and a dopant doped in the base material. The dopant comprises Al, Ta, W, or a combination thereof. The first layer and the second layer comprise different materials. A method of manufacturing the semiconductor device is also provided.
    Type: Application
    Filed: January 23, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Fen Chien, Hsiao-Kuan Wei, Hsien-Ming Lee, Chin-You Hsu
  • Patent number: 10014445
    Abstract: A manufacturing method of a light-emitting device is disclosed. The method includes: providing a semiconductor wafer, including a substrate having a first surface and a second surface opposite to the first surface; and a semiconductor stack on the first surface; removing a portion of the semiconductor stack to form an exposed region; forming a first reflective structure on the exposed region; and providing a radiation on the second surface corresponding to a position of the first reflective structure.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: July 3, 2018
    Assignee: EPISTAR Corporation
    Inventors: Jar-Yu Wu, Chun-Lung Tseng, Ching-Hsing Shen, Wei-Ting Cheng, Jui-Fen Chien, Yu-Ming Kung, Chiao-Yao Cheng
  • Publication number: 20170200866
    Abstract: A manufacturing method of a light-emitting device is disclosed. The method includes: providing a semiconductor wafer, including a substrate having a first surface and a second surface opposite to the first surface; and a semiconductor stack on the first surface; removing a portion of the semiconductor stack to form an exposed region; forming a first reflective structure on the exposed region; and providing a radiation on the second surface corresponding to a position of the first reflective structure.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 13, 2017
    Inventors: Jar-Yu WU, Chun-Lung TSENG, Ching-Hsing SHEN, Wei-Ting CHENG, Jui-Fen CHIEN, Yu-Ming KUNG, Chiao-Yao CHENG